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Merge pull request #78 from NuxiNL/cleanups

Browse source 
Cleanups
This commit is contained in:
Viral B. Shah 2015-01-11 00:46:04 +05:30
commit f418d26601
18 changed files with 754 additions and 25 deletions
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7
amd64/fenv.c
View file

@ -128,7 +128,7 @@ feupdateenv(const fenv_t *envp)
}
int
__feenableexcept(int mask)
feenableexcept(int mask)
{
uint32_t mxcsr, omask;
uint16_t control;
@ -145,7 +145,7 @@ __feenableexcept(int mask)
}
int
__fedisableexcept(int mask)
fedisableexcept(int mask)
{
uint32_t mxcsr, omask;
uint16_t control;
@ -160,6 +160,3 @@ __fedisableexcept(int mask)
__ldmxcsr(mxcsr);
return (omask);
}
__weak_reference(__feenableexcept, feenableexcept);
__weak_reference(__fedisableexcept, fedisableexcept);

0
amd64/fenv.h → amd64/openlibm_fenv.h
View file

0
arm/fenv.h → arm/openlibm_fenv.h
View file

7
i387/fenv.c
View file

@ -182,7 +182,7 @@ feupdateenv(const fenv_t *envp)
}
int
__feenableexcept(int mask)
feenableexcept(int mask)
{
uint32_t mxcsr, omask;
uint16_t control;
@ -204,7 +204,7 @@ __feenableexcept(int mask)
}
int
__fedisableexcept(int mask)
fedisableexcept(int mask)
{
uint32_t mxcsr, omask;
uint16_t control;
@ -224,6 +224,3 @@ __fedisableexcept(int mask)
}
return (omask);
}
__weak_reference(__feenableexcept, feenableexcept);
__weak_reference(__fedisableexcept, fedisableexcept);

0
i387/fenv.h → i387/openlibm_fenv.h
View file

6
src/e_gamma.c
View file

@ -25,10 +25,12 @@
#include "math_private.h"
extern int signgam;
DLLEXPORT double
__ieee754_gamma(double x)
{
#ifdef OPENLIBM_ONLY_THREAD_SAFE
int signgam;
#endif
return __ieee754_gamma_r(x,&signgam);
}

6
src/e_gammaf.c
View file

@ -26,10 +26,12 @@
#include "math_private.h"
extern int signgam;
DLLEXPORT float
__ieee754_gammaf(float x)
{
#ifdef OPENLIBM_ONLY_THREAD_SAFE
int signgam;
#endif
return __ieee754_gammaf_r(x,&signgam);
}

6
src/e_lgamma.c
View file

@ -25,10 +25,12 @@
#include "math_private.h"
extern int signgam;
DLLEXPORT double
__ieee754_lgamma(double x)
{
#ifdef OPENLIBM_ONLY_THREAD_SAFE
int signgam;
#endif
return __ieee754_lgamma_r(x,&signgam);
}

6
src/e_lgammaf.c
View file

@ -26,10 +26,12 @@
#include "math_private.h"
extern int signgam;
DLLEXPORT float
__ieee754_lgammaf(float x)
{
#ifdef OPENLIBM_ONLY_THREAD_SAFE
int signgam;
#endif
return __ieee754_lgammaf_r(x,&signgam);
}

5
src/e_lgammal.c
View file

@ -4,11 +4,12 @@
#include "math_private.h"
extern int signgam;
DLLEXPORT long double
lgammal(long double x)
{
#ifdef OPENLIBM_ONLY_THREAD_SAFE
int signgam;
#endif
return (lgammal_r(x, &signgam));
}

18
src/openlibm.h
View file

@ -170,7 +170,10 @@ extern const union __nan_un {
#define M_SQRT1_2 0.70710678118654752440 /* 1/sqrt(2) */
#define MAXFLOAT ((float)3.40282346638528860e+38)
#ifndef OPENLIBM_ONLY_THREAD_SAFE
extern int signgam;
#endif
#endif /* __BSD_VISIBLE || __XSI_VISIBLE */
#if __BSD_VISIBLE
@ -315,6 +318,11 @@ int isnanf(float) __pure2;
double gamma_r(double, int *);
double lgamma_r(double, int *);
/*
* Single sine/cosine function.
*/
void sincos(double, double *, double *);
/*
* IEEE Test Vector
*/
@ -411,6 +419,11 @@ float ynf(int, float);
float gammaf_r(float, int *);
float lgammaf_r(float, int *);
/*
* Single sine/cosine function.
*/
void sincosf(float, float *, float *);
/*
* float version of IEEE Test Vector
*/
@ -485,6 +498,11 @@ long double truncl(long double);
/* Reentrant version of lgammal. */
#if __BSD_VISIBLE
long double lgammal_r(long double, int *);
/*
* Single sine/cosine function.
*/
void sincosl(long double, long double *, long double *);
#endif /* __BSD_VISIBLE */
#if defined(__cplusplus)

6
src/openlibm_fenv.h
View file

@ -3,11 +3,11 @@
#else /* !OPENLIBM_USE_HOST_FENV_H */
#if defined(__arm__)
#include "../arm/fenv.h"
#include <openlibm_fenv_arm.h>
#elif defined(__x86_64__)
#include "../amd64/fenv.h"
#include <openlibm_fenv_amd64.h>
#elif defined(__i386__)
#include "../i387/fenv.h"
#include <openlibm_fenv_i387.h>
#else
#error "Unsupported platform"
#endif

224
src/openlibm_fenv_amd64.h Normal file
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@ -0,0 +1,224 @@
/*-
* Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD: src/lib/msun/amd64/fenv.h,v 1.8 2011/10/10 15:43:09 das Exp $
*/
#ifndef _FENV_H_
#define _FENV_H_
#include "cdefs-compat.h"
#include "types-compat.h"
#include "math_private.h"
#ifndef __fenv_static
#define __fenv_static static
#endif
typedef struct {
struct {
uint32_t __control;
uint32_t __status;
uint32_t __tag;
char __other[16];
} __x87;
uint32_t __mxcsr;
} fenv_t;
typedef uint16_t fexcept_t;
/* Exception flags */
#define FE_INVALID 0x01
#define FE_DENORMAL 0x02
#define FE_DIVBYZERO 0x04
#define FE_OVERFLOW 0x08
#define FE_UNDERFLOW 0x10
#define FE_INEXACT 0x20
#define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_DENORMAL | FE_INEXACT | \
FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW)
/* Rounding modes */
#define FE_TONEAREST 0x0000
#define FE_DOWNWARD 0x0400
#define FE_UPWARD 0x0800
#define FE_TOWARDZERO 0x0c00
#define _ROUND_MASK (FE_TONEAREST | FE_DOWNWARD | \
FE_UPWARD | FE_TOWARDZERO)
/*
* As compared to the x87 control word, the SSE unit's control word
* has the rounding control bits offset by 3 and the exception mask
* bits offset by 7.
*/
#define _SSE_ROUND_SHIFT 3
#define _SSE_EMASK_SHIFT 7
__BEGIN_DECLS
/* Default floating-point environment */
extern const fenv_t __fe_dfl_env;
#define FE_DFL_ENV (&__fe_dfl_env)
#define __fldcw(__cw) __asm __volatile("fldcw %0" : : "m" (__cw))
#define __fldenv(__env) __asm __volatile("fldenv %0" : : "m" (__env))
#define __fldenvx(__env) __asm __volatile("fldenv %0" : : "m" (__env) \
: "st", "st(1)", "st(2)", "st(3)", "st(4)", \
"st(5)", "st(6)", "st(7)")
#define __fnclex() __asm __volatile("fnclex")
#define __fnstenv(__env) __asm __volatile("fnstenv %0" : "=m" (*(__env)))
#define __fnstcw(__cw) __asm __volatile("fnstcw %0" : "=m" (*(__cw)))
#define __fnstsw(__sw) __asm __volatile("fnstsw %0" : "=am" (*(__sw)))
#define __fwait() __asm __volatile("fwait")
#define __ldmxcsr(__csr) __asm __volatile("ldmxcsr %0" : : "m" (__csr))
#define __stmxcsr(__csr) __asm __volatile("stmxcsr %0" : "=m" (*(__csr)))
__fenv_static __attribute__((always_inline)) DLLEXPORT inline int
feclearexcept(int __excepts)
{
fenv_t __env;
if (__excepts == FE_ALL_EXCEPT) {
__fnclex();
} else {
__fnstenv(&__env.__x87);
__env.__x87.__status &= ~__excepts;
__fldenv(__env.__x87);
}
__stmxcsr(&__env.__mxcsr);
__env.__mxcsr &= ~__excepts;
__ldmxcsr(__env.__mxcsr);
return (0);
}
__fenv_static DLLEXPORT inline int
fegetexceptflag(fexcept_t *__flagp, int __excepts)
{
uint32_t __mxcsr;
uint16_t __status;
__stmxcsr(&__mxcsr);
__fnstsw(&__status);
*__flagp = (__mxcsr | __status) & __excepts;
return (0);
}
DLLEXPORT int fesetexceptflag(const fexcept_t *__flagp, int __excepts);
DLLEXPORT int feraiseexcept(int __excepts);
__fenv_static __attribute__((always_inline)) DLLEXPORT inline int
fetestexcept(int __excepts)
{
uint32_t __mxcsr;
uint16_t __status;
__stmxcsr(&__mxcsr);
__fnstsw(&__status);
return ((__status | __mxcsr) & __excepts);
}
__fenv_static DLLEXPORT inline int
fegetround(void)
{
uint16_t __control;
/*
* We assume that the x87 and the SSE unit agree on the
* rounding mode. Reading the control word on the x87 turns
* out to be about 5 times faster than reading it on the SSE
* unit on an Opteron 244.
*/
__fnstcw(&__control);
return (__control & _ROUND_MASK);
}
__fenv_static DLLEXPORT inline int
fesetround(int __round)
{
uint32_t __mxcsr;
uint16_t __control;
if (__round & ~_ROUND_MASK)
return (-1);
__fnstcw(&__control);
__control &= ~_ROUND_MASK;
__control |= __round;
__fldcw(__control);
__stmxcsr(&__mxcsr);
__mxcsr &= ~(_ROUND_MASK << _SSE_ROUND_SHIFT);
__mxcsr |= __round << _SSE_ROUND_SHIFT;
__ldmxcsr(__mxcsr);
return (0);
}
DLLEXPORT int fegetenv(fenv_t *__envp);
DLLEXPORT int feholdexcept(fenv_t *__envp);
__fenv_static DLLEXPORT inline int
fesetenv(const fenv_t *__envp)
{
/*
* XXX Using fldenvx() instead of fldenv() tells the compiler that this
* instruction clobbers the i387 register stack. This happens because
* we restore the tag word from the saved environment. Normally, this
* would happen anyway and we wouldn't care, because the ABI allows
* function calls to clobber the i387 regs. However, fesetenv() is
* inlined, so we need to be more careful.
*/
__fldenvx(__envp->__x87);
__ldmxcsr(__envp->__mxcsr);
return (0);
}
DLLEXPORT int feupdateenv(const fenv_t *__envp);
#if __BSD_VISIBLE
DLLEXPORT int feenableexcept(int __mask);
DLLEXPORT int fedisableexcept(int __mask);
/* We currently provide no external definition of fegetexcept(). */
static inline DLLEXPORT int
fegetexcept(void)
{
uint16_t __control;
/*
* We assume that the masks for the x87 and the SSE unit are
* the same.
*/
__fnstcw(&__control);
return (~__control & FE_ALL_EXCEPT);
}
#endif /* __BSD_VISIBLE */
__END_DECLS
#endif /* !_FENV_H_ */

223
src/openlibm_fenv_arm.h Normal file
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@ -0,0 +1,223 @@
/*-
* Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD: src/lib/msun/arm/fenv.h,v 1.6 2011/10/10 15:43:09 das Exp $
*/
#ifndef _FENV_H_
#define _FENV_H_
#include <stdint.h>
#ifndef __fenv_static
#define __fenv_static static
#endif
typedef uint32_t fenv_t;
typedef uint32_t fexcept_t;
/* Exception flags */
#define FE_INVALID 0x0001
#define FE_DIVBYZERO 0x0002
#define FE_OVERFLOW 0x0004
#define FE_UNDERFLOW 0x0008
#define FE_INEXACT 0x0010
#define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | \
FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW)
/* Rounding modes */
#define FE_TONEAREST 0x0000
#define FE_TOWARDZERO 0x0001
#define FE_UPWARD 0x0002
#define FE_DOWNWARD 0x0003
#define _ROUND_MASK (FE_TONEAREST | FE_DOWNWARD | \
FE_UPWARD | FE_TOWARDZERO)
__BEGIN_DECLS
/* Default floating-point environment */
extern const fenv_t __fe_dfl_env;
#define FE_DFL_ENV (&__fe_dfl_env)
/* We need to be able to map status flag positions to mask flag positions */
#define _FPUSW_SHIFT 16
#define _ENABLE_MASK (FE_ALL_EXCEPT << _FPUSW_SHIFT)
#ifdef ARM_HARD_FLOAT
#define __rfs(__fpsr) __asm __volatile("rfs %0" : "=r" (*(__fpsr)))
#define __wfs(__fpsr) __asm __volatile("wfs %0" : : "r" (__fpsr))
#else
#define __rfs(__fpsr)
#define __wfs(__fpsr)
#endif
__fenv_static inline int
feclearexcept(int __excepts)
{
fexcept_t __fpsr;
__rfs(&__fpsr);
__fpsr &= ~__excepts;
__wfs(__fpsr);
return (0);
}
__fenv_static inline int
fegetexceptflag(fexcept_t *__flagp, int __excepts)
{
fexcept_t __fpsr;
__rfs(&__fpsr);
*__flagp = __fpsr & __excepts;
return (0);
}
__fenv_static inline int
fesetexceptflag(const fexcept_t *__flagp, int __excepts)
{
fexcept_t __fpsr;
__rfs(&__fpsr);
__fpsr &= ~__excepts;
__fpsr |= *__flagp & __excepts;
__wfs(__fpsr);
return (0);
}
__fenv_static inline int
feraiseexcept(int __excepts)
{
fexcept_t __ex = __excepts;
fesetexceptflag(&__ex, __excepts); /* XXX */
return (0);
}
__fenv_static inline int
fetestexcept(int __excepts)
{
fexcept_t __fpsr;
__rfs(&__fpsr);
return (__fpsr & __excepts);
}
__fenv_static inline int
fegetround(void)
{
/*
* Apparently, the rounding mode is specified as part of the
* instruction format on ARM, so the dynamic rounding mode is
* indeterminate. Some FPUs may differ.
*/
return (-1);
}
__fenv_static inline int
fesetround(int __round)
{
return (-1);
}
__fenv_static inline int
fegetenv(fenv_t *__envp)
{
__rfs(__envp);
return (0);
}
__fenv_static inline int
feholdexcept(fenv_t *__envp)
{
fenv_t __env;
__rfs(&__env);
*__envp = __env;
__env &= ~(FE_ALL_EXCEPT | _ENABLE_MASK);
__wfs(__env);
return (0);
}
__fenv_static inline int
fesetenv(const fenv_t *__envp)
{
__wfs(*__envp);
return (0);
}
__fenv_static inline int
feupdateenv(const fenv_t *__envp)
{
fexcept_t __fpsr;
__rfs(&__fpsr);
__wfs(*__envp);
feraiseexcept(__fpsr & FE_ALL_EXCEPT);
return (0);
}
#if __BSD_VISIBLE
/* We currently provide no external definitions of the functions below. */
static inline int
feenableexcept(int __mask)
{
fenv_t __old_fpsr, __new_fpsr;
__rfs(&__old_fpsr);
__new_fpsr = __old_fpsr | (__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT;
__wfs(__new_fpsr);
return ((__old_fpsr >> _FPUSW_SHIFT) & FE_ALL_EXCEPT);
}
static inline int
fedisableexcept(int __mask)
{
fenv_t __old_fpsr, __new_fpsr;
__rfs(&__old_fpsr);
__new_fpsr = __old_fpsr & ~((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT);
__wfs(__new_fpsr);
return ((__old_fpsr >> _FPUSW_SHIFT) & FE_ALL_EXCEPT);
}
static inline int
fegetexcept(void)
{
fenv_t __fpsr;
__rfs(&__fpsr);
return ((__fpsr & _ENABLE_MASK) >> _FPUSW_SHIFT);
}
#endif /* __BSD_VISIBLE */
__END_DECLS
#endif /* !_FENV_H_ */

259
src/openlibm_fenv_i387.h Normal file
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@ -0,0 +1,259 @@
/*-
* Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD: src/lib/msun/i387/fenv.h,v 1.8 2011/10/10 15:43:09 das Exp $
*/
#ifndef _FENV_H_
#define _FENV_H_
#include "cdefs-compat.h"
#include "types-compat.h"
#ifndef __fenv_static
#define __fenv_static static
#endif
/*
* To preserve binary compatibility with FreeBSD 5.3, we pack the
* mxcsr into some reserved fields, rather than changing sizeof(fenv_t).
*/
typedef struct {
uint16_t __control;
uint16_t __mxcsr_hi;
uint16_t __status;
uint16_t __mxcsr_lo;
uint32_t __tag;
char __other[16];
} fenv_t;
#define __get_mxcsr(env) (((env).__mxcsr_hi << 16) | \
((env).__mxcsr_lo))
#define __set_mxcsr(env, x) do { \
(env).__mxcsr_hi = (uint32_t)(x) >> 16; \
(env).__mxcsr_lo = (uint16_t)(x); \
} while (0)
typedef uint16_t fexcept_t;
/* Exception flags */
#define FE_INVALID 0x01
#define FE_DENORMAL 0x02
#define FE_DIVBYZERO 0x04
#define FE_OVERFLOW 0x08
#define FE_UNDERFLOW 0x10
#define FE_INEXACT 0x20
#define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_DENORMAL | FE_INEXACT | \
FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW)
/* Rounding modes */
#define FE_TONEAREST 0x0000
#define FE_DOWNWARD 0x0400
#define FE_UPWARD 0x0800
#define FE_TOWARDZERO 0x0c00
#define _ROUND_MASK (FE_TONEAREST | FE_DOWNWARD | \
FE_UPWARD | FE_TOWARDZERO)
/*
* As compared to the x87 control word, the SSE unit's control word
* has the rounding control bits offset by 3 and the exception mask
* bits offset by 7.
*/
#define _SSE_ROUND_SHIFT 3
#define _SSE_EMASK_SHIFT 7
__BEGIN_DECLS
/* After testing for SSE support once, we cache the result in __has_sse. */
enum __sse_support { __SSE_YES, __SSE_NO, __SSE_UNK };
extern enum __sse_support __has_sse;
int __test_sse(void);
#ifdef __SSE__
#define __HAS_SSE() 1
#else
#define __HAS_SSE() (__has_sse == __SSE_YES || \
(__has_sse == __SSE_UNK && __test_sse()))
#endif
/* Default floating-point environment */
extern const fenv_t __fe_dfl_env;
#define FE_DFL_ENV (&__fe_dfl_env)
#define __fldcw(__cw) __asm __volatile("fldcw %0" : : "m" (__cw))
#define __fldenv(__env) __asm __volatile("fldenv %0" : : "m" (__env))
#define __fldenvx(__env) __asm __volatile("fldenv %0" : : "m" (__env) \
: "st", "st(1)", "st(2)", "st(3)", "st(4)", \
"st(5)", "st(6)", "st(7)")
#define __fnclex() __asm __volatile("fnclex")
#define __fnstenv(__env) __asm __volatile("fnstenv %0" : "=m" (*(__env)))
#define __fnstcw(__cw) __asm __volatile("fnstcw %0" : "=m" (*(__cw)))
#define __fnstsw(__sw) __asm __volatile("fnstsw %0" : "=am" (*(__sw)))
#define __fwait() __asm __volatile("fwait")
#define __ldmxcsr(__csr) __asm __volatile("ldmxcsr %0" : : "m" (__csr))
#define __stmxcsr(__csr) __asm __volatile("stmxcsr %0" : "=m" (*(__csr)))
__fenv_static inline int
feclearexcept(int __excepts)
{
fenv_t __env;
uint32_t __mxcsr;
if (__excepts == FE_ALL_EXCEPT) {
__fnclex();
} else {
__fnstenv(&__env);
__env.__status &= ~__excepts;
__fldenv(__env);
}
if (__HAS_SSE()) {
__stmxcsr(&__mxcsr);
__mxcsr &= ~__excepts;
__ldmxcsr(__mxcsr);
}
return (0);
}
__fenv_static inline int
fegetexceptflag(fexcept_t *__flagp, int __excepts)
{
uint32_t __mxcsr;
uint16_t __status;
__fnstsw(&__status);
if (__HAS_SSE())
__stmxcsr(&__mxcsr);
else
__mxcsr = 0;
*__flagp = (__mxcsr | __status) & __excepts;
return (0);
}
int fesetexceptflag(const fexcept_t *__flagp, int __excepts);
int feraiseexcept(int __excepts);
__fenv_static inline int
fetestexcept(int __excepts)
{
uint32_t __mxcsr;
uint16_t __status;
__fnstsw(&__status);
if (__HAS_SSE())
__stmxcsr(&__mxcsr);
else
__mxcsr = 0;
return ((__status | __mxcsr) & __excepts);
}
__fenv_static inline int
fegetround(void)
{
uint16_t __control;
/*
* We assume that the x87 and the SSE unit agree on the
* rounding mode. Reading the control word on the x87 turns
* out to be about 5 times faster than reading it on the SSE
* unit on an Opteron 244.
*/
__fnstcw(&__control);
return (__control & _ROUND_MASK);
}
__fenv_static inline int
fesetround(int __round)
{
uint32_t __mxcsr;
uint16_t __control;
if (__round & ~_ROUND_MASK)
return (-1);
__fnstcw(&__control);
__control &= ~_ROUND_MASK;
__control |= __round;
__fldcw(__control);
if (__HAS_SSE()) {
__stmxcsr(&__mxcsr);
__mxcsr &= ~(_ROUND_MASK << _SSE_ROUND_SHIFT);
__mxcsr |= __round << _SSE_ROUND_SHIFT;
__ldmxcsr(__mxcsr);
}
return (0);
}
int fegetenv(fenv_t *__envp);
int feholdexcept(fenv_t *__envp);
__fenv_static inline int
fesetenv(const fenv_t *__envp)
{
fenv_t __env = *__envp;
uint32_t __mxcsr;
__mxcsr = __get_mxcsr(__env);
__set_mxcsr(__env, 0xffffffff);
/*
* XXX Using fldenvx() instead of fldenv() tells the compiler that this
* instruction clobbers the i387 register stack. This happens because
* we restore the tag word from the saved environment. Normally, this
* would happen anyway and we wouldn't care, because the ABI allows
* function calls to clobber the i387 regs. However, fesetenv() is
* inlined, so we need to be more careful.
*/
__fldenvx(__env);
if (__HAS_SSE())
__ldmxcsr(__mxcsr);
return (0);
}
int feupdateenv(const fenv_t *__envp);
#if __BSD_VISIBLE
int feenableexcept(int __mask);
int fedisableexcept(int __mask);
/* We currently provide no external definition of fegetexcept(). */
static inline int
fegetexcept(void)
{
uint16_t __control;
/*
* We assume that the masks for the x87 and the SSE unit are
* the same.
*/
__fnstcw(&__control);
return (~__control & FE_ALL_EXCEPT);
}
#endif /* __BSD_VISIBLE */
__END_DECLS
#endif /* !_FENV_H_ */

2
src/s_signgam.c
View file

@ -2,4 +2,6 @@
#include "math_private.h"
#ifndef OPENLIBM_ONLY_THREAD_SAFE
int signgam = 0;
#endif

2
src/s_sincos.c
View file

@ -58,7 +58,7 @@ C4 = -2.75573143513906633035e-07, /* 0xBE927E4F, 0x809C52AD */
C5 = 2.08757232129817482790e-09, /* 0x3E21EE9E, 0xBDB4B1C4 */
C6 = -1.13596475577881948265e-11; /* 0xBDA8FAE9, 0xBE8838D4 */
DLLEXPORT void
static void
__kernel_sincos( double x, double y, int iy, double * k_s, double * k_c )
{
/* Inline calculation of sin/cos, as we can save

2
src/s_sincosf.c
View file

@ -41,7 +41,7 @@ C1 = 0x155553e1053a42.0p-57, /* 0.0416666233237390631894 */
C2 = -0x16c087e80f1e27.0p-62, /* -0.00138867637746099294692 */
C3 = 0x199342e0ee5069.0p-68; /* 0.0000243904487962774090654 */
DLLEXPORT void
static void
__kernel_sincosdf( double x, float * s, float * c )
{
double r, w, z, v;