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25db504c22
Almost-complete implementation of fxos, the disassembler in particular is now able to detect syscalls and register addresses on the fly, plus support for SH4-only instructions.
26 lines
761 B
Text
26 lines
761 B
Text
# Instruction decoding table: 'sh4'
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# This table is an extension for SH4 processors. See 'asm-sh3.txt' for details
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# on the format.
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0000nnnn01110011 movco.l r0, @rn
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0000mmmm01100011 movli.l @rm, r0
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0100mmmm10101001 movua.l @rm, r0
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0100mmmm11101001 movua.l @rm+, r0
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0000nnnn11000011 movca.l r0, @rn
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0000nnnn11100011 icbi @rn
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0000nnnn10010011 ocbi @rn
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0000nnnn10100011 ocbp @rn
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0000nnnn10110011 ocbwb @rn
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0000nnnn11010011 prefi @rn
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0000000010101011 synco
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0100mmmm00111010 ldc rm, sgr
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0100mmmm11111010 ldc rm, dbr
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0100mmmm00110110 ldc.l @rm+, sgr
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0100mmmm11110110 ldc.l @rm+, dbr
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0000nnnn00111010 stc sgr, rn
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0000nnnn11111010 stc dbr, rn
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0100nnnn00110010 stc.l sgr, @-rn
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0100nnnn11110010 stc.l dbr, @-rn
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