2018-04-19 13:24:26 +02:00
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/*
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Linker script for fxcg50 add-ins. Most symbols are used in the startup
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routine in core/start.c; some others in core/setup.c.
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*/
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/* All fxcg50 have SH4 processors (finally rid of compatibility issues) */
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OUTPUT_ARCH(sh4)
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/* ELF offers a lot of symbol/section/relocation insights */
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OUTPUT_FORMAT(elf32-sh)
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/* Located in core/start.c */
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ENTRY(_start)
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MEMORY
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{
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/* Userspace mapping of the add-in (without G3A header) */
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rom (rx): o = 0x00300000, l = 220k
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/* Static RAM; stack grows down from the end of this region.
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The first 0x2000 bytes are reserved by gint, see below */
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ram (rw): o = 0x08102000, l = 512k
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/* gint's VBR space, mentioned here for completeness */
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2018-08-19 17:11:37 +02:00
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vbr (rwx): o = 0x8c160000, l = 5k
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2018-04-19 13:24:26 +02:00
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/* Some RAM region from P1 area; gint's data will reside here */
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2018-08-19 17:11:37 +02:00
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rram (rwx): o = 0x8c161400, l = 3k
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2018-04-19 13:24:26 +02:00
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}
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SECTIONS
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{
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/*
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** ROM sections
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*/
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/* First address to be mapped to ROM */
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_brom = 0x00300000;
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/* Size of ROM mappings */
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_srom = SIZEOF(.text) + SIZEOF(.rodata)
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+ SIZEOF(.gint.drivers) + SIZEOF(.gint.blocks);
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/* Machine code going to ROM:
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- Initialization sections (.pretext.entry and .pretext)
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- Compiler-provided constructors (.ctors) and destructors (.dtors)
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- All text from .text and .text.* (including user code) */
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.text : {
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*(.pretext.entry)
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*(.pretext)
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_btors = . ;
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*(.ctors .ctors.*)
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_mtors = . ;
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*(.dtors .dtors.*)
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_etors = . ;
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*(.text .text.*)
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} > rom
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/* Interrupt handlers going to ROM:
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- gint's interrupt handler blocks (.gint.blocks)
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Although gint's blocks end up in VBR space, they are installed at
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startup by the library/drivers, so we store them here for now */
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.gint.blocks : {
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KEEP(*(.gint.blocks));
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} > rom
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/* Driver data going to ROM:
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- Exposed driver interfaces (.gint.drivers)
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The driver information is required to start and configure the
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driver, even if the symbols are not referenced */
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.gint.drivers : {
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_bdrv = . ;
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2018-08-19 17:11:37 +02:00
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KEEP(*(.gint.drivers.0));
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KEEP(*(.gint.drivers.1));
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KEEP(*(.gint.drivers.2));
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KEEP(*(.gint.drivers.3));
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KEEP(*(.gint.drivers.4));
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KEEP(*(.gint.drivers.5));
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KEEP(*(.gint.drivers.6));
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2018-04-19 13:24:26 +02:00
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_edrv = . ;
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} > rom
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/* Read-only data going to ROM:
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- Resources or assets from fxconv or similar converters
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- Data marked read-only by the compiler (.rodata and .rodata.*) */
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.rodata : SUBALIGN(4) {
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/* Put these first, they need to be 4-aligned */
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*(.rodata.assets)
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*(.rodata .rodata.*)
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} > rom
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/*
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** RAM sections
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*/
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. = ORIGIN(ram);
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/* BSS data going to RAM. The BSS section is to be stripped from the
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ELF file later, and wiped at startup */
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.bss (NOLOAD) : {
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_rbss = . ;
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*(.bss COMMON)
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. = ALIGN(16);
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} > ram :NONE
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_sbss = SIZEOF(.bss);
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/* Read-write data sextions going to RAM (.data and .data.*) */
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.data ALIGN(4) : ALIGN(4) {
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_ldata = LOADADDR(.data);
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_rdata = . ;
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*(.data .data.*)
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. = ALIGN(16);
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} > ram AT> rom
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_sdata = SIZEOF(.data);
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/*
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** gint-related sections
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2018-08-01 20:41:36 +02:00
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** 8c160000:4k VBR space
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** 8c161000:4k .gint.data and .gint.bss
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2018-04-19 13:24:26 +02:00
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*/
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/* VBR address: let's just start at the beginning of the RAM area.
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There's an unused 0x100-byte gap at the start of the VBR space.
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The VBR space is already a large block (> 2 kiB), so I'm cutting off
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the gap to spare some memory */
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2018-08-01 20:41:36 +02:00
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_gint_vbr = ORIGIN(vbr) - 0x100;
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2018-04-19 13:24:26 +02:00
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. = ORIGIN(rram);
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/* gint's data section, going to static RAM. This section contains many
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small objects from the library (static/global variables, etc) */
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.gint.data ALIGN(4) : ALIGN(4) {
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_lgdata = LOADADDR(.gint.data);
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_rgdata = . ;
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*(.gint.data .gint.data.*)
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. = ALIGN(16);
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} > rram AT> rom
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_sgdata = SIZEOF(.gint.data);
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/* gint's uninitialized BSS section, going to static RAM. All the large
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data arrays will be located here */
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.gint.bss (NOLOAD) : {
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/* Since it's uninitialized, the location doesn't matter */
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*(.gint.bss .gint.bss.*)
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. = ALIGN(16);
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} > rram :NONE
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_sgbss = SIZEOF(.gint.bss);
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/*
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** Other sections
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*/
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/* Unwanted sections going to meet Dave Null:
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2018-08-01 20:41:36 +02:00
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- SH3-only data sections
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- Debug sections, often come out of libgcc
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2018-04-19 13:24:26 +02:00
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- Java classes registration (why are there even here?)
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- Asynchronous unwind tables: no C++ exception handling for now ^^
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- Comments or anything the compiler might put in its assembler */
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/DISCARD/ : {
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2018-08-01 20:41:36 +02:00
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*(.gint.bss.sh3)
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*(.gint.data.sh3)
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*(.debug_info .debug_abbrev .debug_loc .debug_aranges
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.debug_ranges .debug_line .debug_str)
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2018-04-19 13:24:26 +02:00
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*(.jcr)
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*(.eh_frame_hdr)
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*(.eh_frame)
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*(.comment)
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}
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}
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