Fcalva/gint
1
0
Fork 0
mirror of https://git.planet-casio.com/Lephenixnoir/gint.git synced 2025-04-18 08:56:58 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions

periodic check of SH3 compatibility

Browse source
This commit is contained in:
Lephe 2020-05-31 22:26:30 +02:00
parent 50cc536324
commit 0498344349
No known key found for this signature in database
GPG key ID: 1BBA026E13FC0495
4 changed files with 36 additions and 7 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

5
include/gint/hardware.h
View file

@ -24,7 +24,8 @@
extern uint32_t gint[HW_KEYS]; extern uint32_t gint[HW_KEYS];
/* MPU detection macros, with a faster version on fx-CG 50 and a generic /* MPU detection macros, with a faster version on fx-CG 50 and a generic
dual-platform version for libraries. */ dual-platform version for libraries.
Warning: this macro is also used hardcoded in exch.s. */
#if defined(FX9860G) || (!defined(FX9860G) && !defined(FXCG50)) #if defined(FX9860G) || (!defined(FX9860G) && !defined(FXCG50))
#define isSH3() (gint[HWMPU] & 1) #define isSH3() (gint[HWMPU] & 1)
@ -75,7 +76,7 @@ void hw_detect(void);
#define HWMPU_UNKNOWN 0 #define HWMPU_UNKNOWN 0
/* Used on original fx-9860G, SH-3-based */ /* Used on original fx-9860G, SH-3-based */
#define HWMPU_SH7337 1 #define HWMPU_SH7337 1
/* Used on recent fx-9860G derivates such as the fx-9750G II, and also on the /* Used on recent fx-9860G derivatives such as the fx-9750G II, and also on the
fx-CG 10/20/50. SH-4A-based */ fx-CG 10/20/50. SH-4A-based */
#define HWMPU_SH7305 2 #define HWMPU_SH7305 2
/* Used on the fx-9860G II, SH-3-based */ /* Used on the fx-9860G II, SH-3-based */

14
src/core/exch.c
View file

@ -11,8 +11,18 @@
/* gint_panic_default(): Default panic handler */ /* gint_panic_default(): Default panic handler */
GNORETURN static void gint_default_panic(GUNUSED uint32_t code) GNORETURN static void gint_default_panic(GUNUSED uint32_t code)
{ {
uint32_t TEA = *(volatile uint32_t *)0xff00000c; uint32_t TEA, TRA;
uint32_t TRA = *(volatile uint32_t *)0xff000020 >> 2;
if(isSH3())
{
TEA = *(volatile uint32_t *)0xfffffffc;
TRA = *(volatile uint32_t *)0xffffffd0 >> 2;
}
else
{
TEA = *(volatile uint32_t *)0xff00000c;
TRA = *(volatile uint32_t *)0xff000020 >> 2;
}
uint32_t PC; uint32_t PC;
__asm__("stc spc, %0" : "=r"(PC)); __asm__("stc spc, %0" : "=r"(PC));

22
src/core/exch.s
View file

@ -4,10 +4,21 @@
_gint_exch_tlbh: _gint_exch_tlbh:
sts.l pr, @-r15 sts.l pr, @-r15
stc.l gbr, @-r15
sts.l mach, @-r15
sts.l macl, @-r15
mov.l r8, @-r15 mov.l r8, @-r15
mov.l .expevt, r8 /* Get the first word of the gint hardware array (HWMPU). If it has the
last bit set, we're SH3 */
mov.l .gint, r0
mov.l @r0, r0
tst #1, r0
mov.l .expevt_sh4, r8
bt catch
mov.l .expevt_sh3, r8
catch:
/* Panic if the catcher is NULL */ /* Panic if the catcher is NULL */
mov.l .catcher, r0 mov.l .catcher, r0
mov.l @r0, r0 mov.l @r0, r0
@ -39,14 +50,21 @@ panic:
end: end:
mov.l @r15+, r8 mov.l @r15+, r8
lds.l @r15+, macl
lds.l @r15+, mach
ldc.l @r15+, gbr
lds.l @r15+, pr lds.l @r15+, pr
rte rte
nop nop
.align 4 .align 4
.expevt: .gint:
.long _gint
.expevt_sh4:
.long 0xff000024 .long 0xff000024
.expevt_sh3:
.long 0xffffffd4
.catcher: .catcher:
.long _gint_exc_catcher .long _gint_exc_catcher
.panic: .panic:

2
src/core/hardware.c
View file

@ -101,7 +101,7 @@ void hw_detect(void)
/* Will be detected later on */ /* Will be detected later on */
gint[HWURAM] = -1; gint[HWURAM] = -1;
/* Traditionally 4 MiB, Graph 35+E II has 8 MiB */ /* Traditionally 4 MiB, Graph 35+E II has 8 MiB */
gint[HWROM] = (gint[HWCALC] == HWCALC_G35PE2) ? (4 << 20) : (8 << 20); gint[HWROM] = (gint[HWCALC] == HWCALC_G35PE2) ? (8 << 20) : (4 << 20);
} }
#endif /* FX9860G and platform-agnostic */ #endif /* FX9860G and platform-agnostic */