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cpg: provide a function to recompute clock frequency
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2 changed files with 18 additions and 7 deletions
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@ -52,6 +52,11 @@ typedef struct
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module; this address never changes. */
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const clock_frequency_t *clock_freq(void);
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/* cpg_compute_freq(): Compute the current clock frequency
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This function updates the data structure returned by clock_freq() by
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determining the current clock frequencies from the CPG. */
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void cpg_compute_freq(void);
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//---
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// Overclock
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//---
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@ -29,7 +29,7 @@ const clock_frequency_t *clock_freq(void)
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#if defined(FX9860G) || (!defined(FX9860G) && !defined(FXCG50))
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#define CPG SH7705_CPG
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static void sh7705_probe(void)
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void sh7705_probe(void)
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{
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/* According to Sentaro21 in the sources of Ftune 1.0.1, the clock mode
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is thought to be 5, which means that:
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@ -115,10 +115,21 @@ static void sh7305_probe(void)
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#undef CPG
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//---
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// Initialization
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//---
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void cpg_compute_freq(void)
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{
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/* This avoids warnings about sh7705_probe() being undefined when
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building for fxcg50 */
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#if defined(FX9860G) || (!defined(FX9860G) && !defined(FXCG50))
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isSH3() ? sh7705_probe() :
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#endif
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sh7305_probe();
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}
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static void configure(void)
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{
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/* Disable spread spectrum in SSGSCR */
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@ -127,12 +138,7 @@ static void configure(void)
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SH7305_CPG.SSCGCR.SSEN = 0;
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}
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/* This avoids warnings about sh7705_probe() being undefined when
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building for fxcg50 */
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#if defined(FX9860G) || (!defined(FX9860G) && !defined(FXCG50))
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isSH3() ? sh7705_probe() :
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#endif
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sh7305_probe();
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cpg_compute_freq();
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}
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//---
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