cpg: provide a function to recompute clock frequency

This commit is contained in:
Lephe 2022-04-15 21:08:37 +01:00
parent fdadb0dd71
commit 0c2935055e
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GPG key ID: 1BBA026E13FC0495
2 changed files with 18 additions and 7 deletions

View file

@ -52,6 +52,11 @@ typedef struct
module; this address never changes. */
const clock_frequency_t *clock_freq(void);
/* cpg_compute_freq(): Compute the current clock frequency
This function updates the data structure returned by clock_freq() by
determining the current clock frequencies from the CPG. */
void cpg_compute_freq(void);
//---
// Overclock
//---

View file

@ -29,7 +29,7 @@ const clock_frequency_t *clock_freq(void)
#if defined(FX9860G) || (!defined(FX9860G) && !defined(FXCG50))
#define CPG SH7705_CPG
static void sh7705_probe(void)
void sh7705_probe(void)
{
/* According to Sentaro21 in the sources of Ftune 1.0.1, the clock mode
is thought to be 5, which means that:
@ -115,10 +115,21 @@ static void sh7305_probe(void)
#undef CPG
//---
// Initialization
//---
void cpg_compute_freq(void)
{
/* This avoids warnings about sh7705_probe() being undefined when
building for fxcg50 */
#if defined(FX9860G) || (!defined(FX9860G) && !defined(FXCG50))
isSH3() ? sh7705_probe() :
#endif
sh7305_probe();
}
static void configure(void)
{
/* Disable spread spectrum in SSGSCR */
@ -127,12 +138,7 @@ static void configure(void)
SH7305_CPG.SSCGCR.SSEN = 0;
}
/* This avoids warnings about sh7705_probe() being undefined when
building for fxcg50 */
#if defined(FX9860G) || (!defined(FX9860G) && !defined(FXCG50))
isSH3() ? sh7705_probe() :
#endif
sh7305_probe();
cpg_compute_freq();
}
//---