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ubc: add a global lock to inform if a UBC break is being handled
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2 changed files with 20 additions and 0 deletions
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@ -27,6 +27,10 @@ void ubc_debug_handler(gdb_cpu_state_t* cpu_state);
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the UBC is reached. */
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void ubc_set_debug_handler(void (*h)(gdb_cpu_state_t*));
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/* ubc_dbh_lock: Lock set by ubc_dbh() when a UBC break is currently being
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handled. */
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extern uint8_t ubc_dbh_lock;
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/* UBC Breakpoint types */
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typedef enum {
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UBC_BREAK_BEFORE, /* Break before the instruction is executed */
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@ -39,6 +39,11 @@ _ubc_dbh:
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stc.l R1_BANK, @-r15
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stc.l R0_BANK, @-r15
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/* We set the ubc_dbh_lock before enabling interrupts */
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mov.l .ubc_dbh_lock, r0
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mov #1, r1
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mov.b r1, @r0
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/* Enable interrupts and switch register bank
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Original SR is kept in r8 */
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stc sr, r8
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@ -55,6 +60,12 @@ _ubc_dbh:
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/* Restore original SR to access the correct register bank */
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ldc r8, sr
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/* We can release the ubc_dbh_lock now that interrupts have been
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disabled */
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mov.l .ubc_dbh_lock, r0
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mov #0, r1
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mov.b r1, @r0
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ldc.l @r15+, R0_BANK
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ldc.l @r15+, R1_BANK
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ldc.l @r15+, R2_BANK
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@ -83,7 +94,12 @@ _ubc_dbh:
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.align 4
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.handler: .long _ubc_debug_handler
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.ubc_dbh_lock: .long _ubc_dbh_lock
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.sr_mask: .long ~0x300000f0 /* IMASK = 0 : mask no interrupts
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BL = 0 : do not block interrupts
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RB = 0 : use register BANK0
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*/
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.data
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.global _ubc_dbh_lock
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_ubc_dbh_lock: .byte 0
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