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https://git.planet-casio.com/Lephenixnoir/gint.git
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exch, inth: save more data in context structure, and simplify entries
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parent
f0bca5183f
commit
4173bf1f78
7 changed files with 46 additions and 67 deletions
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@ -166,16 +166,10 @@ extern int (*gint_inth_callback)(gint_call_t const *call);
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/* gint_inth_callback_context_t: Context of the interrupted function when an
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/* gint_inth_callback_context_t: Context of the interrupted function when an
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interrupt is handled by gint_inth_callback. */
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interrupt is handled by gint_inth_callback. */
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typedef struct {
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typedef struct {
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uint32_t ssr;
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uint32_t mach, macl, gbr;
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uint32_t spc;
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uint32_t sr;
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uint32_t r7;
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uint32_t pc;
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uint32_t r6;
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uint32_t r[8];
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uint32_t r5;
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uint32_t r4;
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uint32_t r3;
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uint32_t r2;
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uint32_t r1;
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uint32_t r0;
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} gint_inth_callback_context_t;
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} gint_inth_callback_context_t;
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/* gint_set_quit_handler(): Setup a call to be invoked when leaving the add-in
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/* gint_set_quit_handler(): Setup a call to be invoked when leaving the add-in
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@ -766,7 +766,7 @@ static void gdb_notifier_function(void)
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if (gdb_single_step_backup.single_stepped)
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if (gdb_single_step_backup.single_stepped)
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return;
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return;
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gdb_handle_single_step(usb_interrupt_context->spc, UBC_BREAK_AFTER);
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gdb_handle_single_step(usb_interrupt_context->pc, UBC_BREAK_AFTER);
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}
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}
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static int gdb_panic_handler(uint32_t code)
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static int gdb_panic_handler(uint32_t code)
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@ -168,8 +168,8 @@ void *intc_handler(int event_code, const void *handler, size_t size)
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/* On SH4, just use the code as offset */
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/* On SH4, just use the code as offset */
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else
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else
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{
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{
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/* 0x40 is the size of the entry gate */
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/* 0x20 is the size of the entry gate */
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dest = (void *)cpu_getVBR() + 0x640 + (event_code - 0x400);
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dest = (void *)cpu_getVBR() + 0x620 + (event_code - 0x400);
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}
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}
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return memcpy(dest, handler, size);
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return memcpy(dest, handler, size);
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@ -4,28 +4,23 @@
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_gint_exch:
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_gint_exch:
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sts.l pr, @-r15
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sts.l pr, @-r15
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stc.l gbr, @-r15
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sts.l mach, @-r15
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sts.l macl, @-r15
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mov.l r8, @-r15
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mov.l r9, @-r15
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/* Get the first word of the gint hardware array (HWMPU). If it has the
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/* Get the first word of the gint hardware array (HWMPU). If it has the
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last bit set, we're SH3 */
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last bit set, we're SH3 */
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mov.l .gint, r0
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mov.l .gint, r0
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mov.l @r0, r0
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mov.l @r0, r0
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tst #1, r0
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tst #1, r0
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mov.l .expevt_sh4, r8
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mov.l .expevt_sh4, r6
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mov.l .tra_sh4, r9
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mov.l .tra_sh4, r7
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bt syscall
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bt syscall
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mov.l .expevt_sh3, r8
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mov.l .expevt_sh3, r6
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mov.l .tra_sh3, r9
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mov.l .tra_sh3, r7
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syscall:
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syscall:
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/* If this is trapa #31, save context and run the syscall interface. */
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/* If this is trapa #31, save context and run the syscall interface. */
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mov.l @r8, r4
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mov.l @r6, r4
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mov.w .expevt_trapa, r5
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mov.w .expevt_trapa, r5
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mov.l @r9, r0
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mov.l @r7, r0
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cmp/eq r4, r5
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cmp/eq r4, r5
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bf catch
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bf catch
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cmp/eq #31*4, r0
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cmp/eq #31*4, r0
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@ -45,36 +40,32 @@ syscall:
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catch:
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catch:
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/* Panic if the catcher is NULL */
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/* Panic if the catcher is NULL */
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mov.l .catcher, r0
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mov.l .catcher, r0
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mov.l r4, @-r15
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mov.l @r0, r0
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mov.l @r0, r0
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tst r0, r0
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tst r0, r0
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bt panic
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bt panic
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/* Set BL=0, IMASK=15 */
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/* Set BL=0, IMASK=15 */
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stc sr, r9
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stc sr, r7
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mov.l r7, @-r15
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mov.l .SR_set_IMASK, r1
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mov.l .SR_set_IMASK, r1
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or r9, r1
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or r7, r1
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mov.l .SR_clear_BL, r2
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mov.l .SR_clear_BL, r2
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and r2, r1
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and r2, r1
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ldc r1, sr
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ldc r1, sr
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/* Call the catcher and leave if it returns zero (exception handled) */
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/* Call the catcher and leave if it returns zero (exception handled) */
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jsr @r0
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jsr @r0
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mov.l @r8, r4
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nop
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ldc r9, sr
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ldc.l @r15+, sr
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tst r0, r0
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tst r0, r0
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bt end
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bt.s end
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mov.l @r15+, r4
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panic:
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panic:
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/* RTE to the panic function, but manually, so that SPC is preserved */
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/* RTE to the panic function, but manually, so that SPC is preserved */
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mov.l @r8, r4
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ldc r4, r4_bank
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ldc r4, r4_bank
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mov.l @r15+, r9
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mov.l @r15+, r8
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lds.l @r15+, macl
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lds.l @r15+, mach
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ldc.l @r15+, gbr
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lds.l @r15+, pr
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lds.l @r15+, pr
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/* Here we switch banks so r0..r7 change meaning! */
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/* Here we switch banks so r0..r7 change meaning! */
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@ -87,11 +78,6 @@ panic:
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nop
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nop
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end:
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end:
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mov.l @r15+, r9
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mov.l @r15+, r8
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lds.l @r15+, macl
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lds.l @r15+, mach
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ldc.l @r15+, gbr
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lds.l @r15+, pr
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lds.l @r15+, pr
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rte
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rte
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nop
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nop
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@ -63,15 +63,12 @@ _gint_inth_7305:
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1: .long 0xff000028
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1: .long 0xff000028
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#endif
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#endif
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/* SH7305-TYPE INTERRUPT HANDLER ENTRY - 40 BYTES */
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/* SH7305-TYPE INTERRUPT HANDLER ENTRY - 28 BYTES */
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_gint_inth_7305:
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_gint_inth_7305:
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/* Save caller-saved registers which might currently be in use by the
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/* Save caller-saved registers which might currently be in use by the
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interrupted function, as we don't know what the callback will do */
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interrupted function, as we don't know what the callback will do */
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sts.l pr, @-r15
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sts.l pr, @-r15
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stc.l gbr, @-r15
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sts.l mach, @-r15
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sts.l macl, @-r15
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/* Get the event code from the INTEVT register */
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/* Get the event code from the INTEVT register */
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mov.l 1f, r0
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mov.l 1f, r0
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@ -89,15 +86,11 @@ _gint_inth_7305:
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.jump_over:
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.jump_over:
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/* Restore caller-saved registers */
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/* Restore caller-saved registers */
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lds.l @r15+, macl
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lds.l @r15+, mach
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ldc.l @r15+, gbr
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lds.l @r15+, pr
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lds.l @r15+, pr
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rte
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rte
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nop
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nop
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.zero 24
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.zero 4
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1: .long 0xff000028
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1: .long 0xff000028
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.first_entry:
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.first_entry:
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@ -200,16 +193,19 @@ _inth_remap:
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@r4 Address of callback function
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@r4 Address of callback function
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-> Returns the return value of the callback (int). */
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-> Returns the return value of the callback (int). */
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_gint_inth_callback_reloc:
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_gint_inth_callback_reloc:
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stc.l r0_bank, @-r15
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stc.l r1_bank, @-r15
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stc.l r2_bank, @-r15
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stc.l r3_bank, @-r15
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stc.l r4_bank, @-r15
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stc.l r5_bank, @-r15
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stc.l r6_bank, @-r15
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stc.l r7_bank, @-r15
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stc.l r7_bank, @-r15
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stc.l r6_bank, @-r15
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stc.l r5_bank, @-r15
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stc.l r4_bank, @-r15
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stc.l r3_bank, @-r15
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stc.l r2_bank, @-r15
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stc.l r1_bank, @-r15
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stc.l r0_bank, @-r15
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stc.l spc, @-r15
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stc.l spc, @-r15
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stc.l ssr, @-r15
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stc.l ssr, @-r15
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stc.l gbr, @-r15
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sts.l macl, @-r15
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sts.l mach, @-r15
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/* We backup the address of the gint_inth_callback_context_t built on
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/* We backup the address of the gint_inth_callback_context_t built on
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the stack to the user bank. */
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the stack to the user bank. */
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ldc r15, r4_bank
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ldc r15, r4_bank
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@ -279,17 +275,20 @@ _gint_inth_callback_reloc:
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/* We can now pull the return value since interrupts are disabled */
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/* We can now pull the return value since interrupts are disabled */
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stc r0_bank, r0
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stc r0_bank, r0
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lds.l @r15+, mach
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lds.l @r15+, macl
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ldc.l @r15+, gbr
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ldc.l @r15+, ssr
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ldc.l @r15+, ssr
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ldc.l @r15+, spc
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ldc.l @r15+, spc
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ldc.l @r15+, r7_bank
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ldc.l @r15+, r6_bank
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ldc.l @r15+, r5_bank
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ldc.l @r15+, r4_bank
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ldc.l @r15+, r3_bank
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ldc.l @r15+, r2_bank
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ldc.l @r15+, r1_bank
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rts
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ldc.l @r15+, r0_bank
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ldc.l @r15+, r0_bank
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ldc.l @r15+, r1_bank
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ldc.l @r15+, r2_bank
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ldc.l @r15+, r3_bank
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ldc.l @r15+, r4_bank
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ldc.l @r15+, r5_bank
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ldc.l @r15+, r6_bank
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rts
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ldc.l @r15+, r7_bank
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.align 4
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.align 4
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.SR_clear_RB_BL:
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.SR_clear_RB_BL:
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@ -83,7 +83,7 @@ void kinit(void)
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/* Load the event handler entry points into memory */
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/* Load the event handler entry points into memory */
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memcpy((void *)VBR + 0x100, gint_exch, exch_size);
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memcpy((void *)VBR + 0x100, gint_exch, exch_size);
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memcpy((void *)VBR + 0x400, gint_tlbh, tlbh_size);
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memcpy((void *)VBR + 0x400, gint_tlbh, tlbh_size);
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memcpy((void *)VBR + 0x600, inth_entry, 64);
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memcpy((void *)VBR + 0x600, inth_entry, isSH3() ? 64 : 32);
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/* Initialize memory allocators */
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/* Initialize memory allocators */
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kmalloc_init();
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kmalloc_init();
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@ -9,5 +9,5 @@ void syscall_entry(gint_inth_callback_context_t *ptr)
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(void)ptr;
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(void)ptr;
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++debug_syscall_count;
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++debug_syscall_count;
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debug_syscall_lastnr = ptr->r3;
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debug_syscall_lastnr = ptr->r[3];
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}
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}
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