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https://git.planet-casio.com/Lephenixnoir/gint.git
synced 2024-12-28 04:23:36 +01:00
ubc: slight cleanup
It is guaranteed by the driver model that drivers are powered on when gint is active. Sharing the driver isn't too useful because we can't remote debug in the OS world anyway, there's no USB driver there.
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faead4bc1d
commit
4623d790cc
2 changed files with 8 additions and 14 deletions
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@ -22,13 +22,15 @@ typedef volatile struct
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uint32_t SZ :3; /* Operand Size Select */
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uint32_t SZ :3; /* Operand Size Select */
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uint32_t :4;
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uint32_t :4;
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uint32_t CD :2; /* Bus Select */
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uint32_t CD :2; /* Bus Select */
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uint32_t ID :2; /* Instruction Fetch / Operand Access Select */
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uint32_t ID :2; /* Ins. Fetch / Operand Access Select */
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uint32_t :1;
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uint32_t :1;
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uint32_t RW :2; /* Bus Command Select */
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uint32_t RW :2; /* Bus Command Select */
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uint32_t CE :1; /* Channel Enable */
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uint32_t CE :1; /* Channel Enable */
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);
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);
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lword_union(CRR0, /* Match operation setting 0 */
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lword_union(CRR0, /* Match operation setting 0 */
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uint32_t :30;
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uint32_t :18;
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uint32_t _1 :1; /* Always set to 1 */
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uint32_t :11;
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uint32_t PCB :1; /* PC Break Select */
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uint32_t PCB :1; /* PC Break Select */
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uint32_t BIE :1; /* Break Enable */
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uint32_t BIE :1; /* Break Enable */
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);
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);
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@ -36,7 +38,6 @@ typedef volatile struct
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uint32_t CAMR0; /* Match address mask setting 0 */
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uint32_t CAMR0; /* Match address mask setting 0 */
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pad(0x10);
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pad(0x10);
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lword_union(CBR1, /* Match condition setting 1 */
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lword_union(CBR1, /* Match condition setting 1 */
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uint32_t MFE :1; /* Match Flag Enable */
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uint32_t MFE :1; /* Match Flag Enable */
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uint32_t AIE :1; /* ASID Enable */
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uint32_t AIE :1; /* ASID Enable */
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@ -47,13 +48,15 @@ typedef volatile struct
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uint32_t ETBE :1; /* Execution Count Value Enable */
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uint32_t ETBE :1; /* Execution Count Value Enable */
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uint32_t :3;
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uint32_t :3;
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uint32_t CD :2; /* Bus Select */
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uint32_t CD :2; /* Bus Select */
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uint32_t ID :2; /* Instruction Fetch / Operand Access Select */
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uint32_t ID :2; /* Ins. Fetch / Operand Access Select */
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uint32_t :1;
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uint32_t :1;
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uint32_t RW :2; /* Bus Command Select */
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uint32_t RW :2; /* Bus Command Select */
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uint32_t CE :1; /* Channel Enable */
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uint32_t CE :1; /* Channel Enable */
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);
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);
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lword_union(CRR1, /* Match operation setting 1 */
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lword_union(CRR1, /* Match operation setting 1 */
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uint32_t :30;
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uint32_t :18;
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uint32_t _1 :1; /* Always set to 1 */
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uint32_t :11;
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uint32_t PCB :1; /* PC Break Select */
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uint32_t PCB :1; /* PC Break Select */
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uint32_t BIE :1; /* Break Enable */
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uint32_t BIE :1; /* Break Enable */
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);
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);
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@ -55,9 +55,6 @@ static void hpoweroff(void)
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} while (0)
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} while (0)
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bool ubc_set_breakpoint(int channel, void* break_address, ubc_break_mode_t break_mode)
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bool ubc_set_breakpoint(int channel, void* break_address, ubc_break_mode_t break_mode)
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{
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{
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if (!hpowered())
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hpoweron();
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uint32_t pcb = break_mode == UBC_BREAK_AFTER ? 1 : 0;
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uint32_t pcb = break_mode == UBC_BREAK_AFTER ? 1 : 0;
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if (channel == 0) {
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if (channel == 0) {
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UBC_BREAK_CHANNEL(CBR0, CRR0, CAR0, CAMR0);
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UBC_BREAK_CHANNEL(CBR0, CRR0, CAR0, CAMR0);
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@ -73,9 +70,6 @@ bool ubc_set_breakpoint(int channel, void* break_address, ubc_break_mode_t break
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bool ubc_get_break_address(int channel, void** break_address)
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bool ubc_get_break_address(int channel, void** break_address)
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{
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{
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if (!hpowered())
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hpoweron();
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if (channel == 0 && UBC.CBR0.CE) {
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if (channel == 0 && UBC.CBR0.CE) {
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*break_address = (void*) UBC.CAR0;
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*break_address = (void*) UBC.CAR0;
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return true;
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return true;
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@ -89,9 +83,6 @@ bool ubc_get_break_address(int channel, void** break_address)
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bool ubc_disable_channel(int channel)
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bool ubc_disable_channel(int channel)
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{
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{
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if (!hpowered())
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hpoweron();
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if (channel == 0) {
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if (channel == 0) {
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UBC.CBR0.CE = 0;
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UBC.CBR0.CE = 0;
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return true;
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return true;
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