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dma: add exception handler and dma_memset()
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lephe
parent
652637d475
commit
6d54a5fe0a
5 changed files with 76 additions and 43 deletions
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@ -55,7 +55,7 @@ typedef enum
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@dst Destination address, must be aligned with transfer size
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@dst_mode Destination address mode */
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void dma_transfer(int channel, dma_size_t size, uint length,
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void *src, dma_address_t src_mode,
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void const *src, dma_address_t src_mode,
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void *dst, dma_address_t dst_mode);
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/* dma_transfer_wait() - Wait for a transfer on channel 0 to finish
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@ -76,7 +76,7 @@ void dma_transfer_wait(int channel);
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Not using interrupts is a bad design idea for a majority of programs, and is
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only ever needed to display panic messages inside exception handlers. */
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void dma_transfer_noint(int channel, dma_size_t size, uint blocks,
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void *src, dma_address_t src_mode,
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void const *src, dma_address_t src_mode,
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void *dst, dma_address_t dst_mode);
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#endif /* GINT_DMA */
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@ -13,7 +13,7 @@
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typedef volatile sh7305_dma_channel_t channel_t;
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/* dma_channel(): returns address of the specified DMA channel */
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/* dma_channel(): Get address of a DMA channel */
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static channel_t *dma_channel(int channel)
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{
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channel_t *addr[6] = {
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@ -24,6 +24,36 @@ static channel_t *dma_channel(int channel)
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return ((uint)channel >= 6 ? NULL : addr[channel]);
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}
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/* dma_translate(): Translate virtual address to DMA-suitable form */
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static uint32_t dma_translate(void const *address)
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{
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uint32_t a = (uint32_t)address;
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/* Preserve RS addresses (as of SH7724 Reference, 11.2.2) */
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if(a >= 0xfd800000 && a < 0xfd800800)
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return a;
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/* Translate virtual addresses to IL memory to physical addresses; the
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same address is used (as of SH7724 Reference, 10.3.3) */
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if(a >= 0xe5200000 && a < 0xe5204000)
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return a;
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/* First additional on-chip memory area (XRAM) */
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if(a >= 0xe5007000 && a < 0xE5009000)
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return a;
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/* Second on-chip memory area (YRAM) */
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if(a >= 0xe5017000 && a < 0xe5019000)
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return a;
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/* Translate P1 and P2 addresses to ROM and RAM to physical form */
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if(a >= 0x80000000 && a < 0xc0000000)
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return a & 0x1fffffff;
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/* By default: I don't know what this is, let's preserve it */
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return a;
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}
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//---
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// Driver interface
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//---
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@ -33,7 +63,7 @@ static channel_t *dma_channel(int channel)
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last parameter indicates whether interrupts should be used.
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Returns non-zero if the DMA is busy or a configuration error occurs. */
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static int dma_setup(int channel, dma_size_t size, uint blocks,
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void *src, dma_address_t src_mode,
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void const *src, dma_address_t src_mode,
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void *dst, dma_address_t dst_mode,
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int interrupts)
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{
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@ -48,8 +78,8 @@ static int dma_setup(int channel, dma_size_t size, uint blocks,
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DMA.OR.DME = 0;
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/* Set DMA source and target address */
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ch->SAR = (uint32_t)src & 0x1fffffff;
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ch->DAR = (uint32_t)dst & 0x1fffffff;
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ch->SAR = dma_translate(src);
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ch->DAR = dma_translate(dst);
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/* Set the number of blocks to be transferred */
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ch->TCR = blocks;
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@ -74,7 +104,7 @@ static int dma_setup(int channel, dma_size_t size, uint blocks,
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/* dma_transfer(): Perform a data transfer */
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void dma_transfer(int channel, dma_size_t size, uint blocks,
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void *src, dma_address_t src_mode,
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void const *src, dma_address_t src_mode,
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void *dst, dma_address_t dst_mode)
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{
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if(dma_setup(channel, size, blocks, src, src_mode, dst, dst_mode, 1))
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@ -97,7 +127,7 @@ void dma_transfer_wait(int channel)
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/* dma_transfer_noint(): Perform a data transfer without interruptions */
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void dma_transfer_noint(int channel, dma_size_t size, uint blocks,
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void *src, dma_address_t src_mode,
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void const *src, dma_address_t src_mode,
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void *dst, dma_address_t dst_mode)
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{
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if(dma_setup(channel, size, blocks, src, src_mode, dst, dst_mode, 0))
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@ -130,7 +160,6 @@ static void init(void)
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if(isSH3()) return;
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/* Install the interrupt handler from dma/inth.s */
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/* TODO: DMA0 error gate is 0xbc0 */
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int codes[] = { 0x800, 0x820, 0x840, 0x860, 0xb80, 0xba0 };
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extern void inth_dma_te(void);
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@ -146,15 +175,18 @@ static void init(void)
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ch->CHCR.DE = 0;
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}
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/* Install the address error gate */
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extern void inth_dma_ae(void);
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gint_inthandler(0xbc0, inth_dma_ae, 32);
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/* Set interrupt priority to 3 (IPRE[15..12] for first three channels,
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IPRF[11..8] for last two and error gate */
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gint_intlevel(16, 3);
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gint_intlevel(21, 3);
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/* Unmask the channel interrupts */
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/* TODO: DMA0 error gate is IMR5 & 0x40 */
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/* Unmask the channel interrupts and the address error */
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INTC.MSKCLR->IMR1 = 0x0f;
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INTC.MSKCLR->IMR5 = 0x30;
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INTC.MSKCLR->IMR5 = 0x70;
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/* Clear blocking flags and enable the master switch */
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DMA.OR.AE = 0;
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@ -4,6 +4,7 @@
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*/
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.global _inth_dma_te
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.global _inth_dma_ae
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.section .gint.blocks, "ax"
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.align 4
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@ -29,3 +30,20 @@ _inth_dma_te:
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1: .long 0 /* CHCR, set dynamically */
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2: .long 0xfe008060 /* DMA.OR */
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/* DMA ADDRESS ERROR INTERRUPT HANDLER - 18 BYTES */
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_inth_dma_ae:
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/* Call a fixed function */
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sts.l pr, @-r15
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mov.l 1f, r1
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jsr @r1
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nop
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lds.l @r15+, pr
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rte
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nop
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.zero 14
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1: .long _dma_address_error
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11
src/dma/memset.c
Normal file
11
src/dma/memset.c
Normal file
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@ -0,0 +1,11 @@
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#include <gint/dma.h>
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/* dma_memset(): Fast memset for highly-aligned addresses */
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void dma_memset(void *dst, uint32_t l, size_t size)
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{
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/* TODO: Use a proper IL memory allocation scheme */
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uint32_t *IL = (void *)0xe5200000;
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for(int i = 0; i < 8; i++) IL[i] = l;
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dma_transfer_noint(1, DMA_32B, size >> 5, IL, DMA_FIXED, dst, DMA_INC);
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}
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@ -1,38 +1,10 @@
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#define GINT_NEED_VRAM
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#include <gint/display.h>
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#include <gint/dma.h>
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/* dclear() - fill the screen with a single color */
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void dclear(uint16_t color)
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{
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/* TOOD: render-cg: dclear(): Consider using the DMA */
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/* Operate in longwords to clear faster. Also start at the end of the
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VRAM to take advantage of pre-decrement writes. */
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uint32_t *v = (void *)(vram + 88704);
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uint32_t op = (color << 16) | color;
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/* Split the VRAM into 2772 blocks of 16 longwords to reduce the
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overhead of the loop */
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for(int blocks = 2772; blocks; blocks--)
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{
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*--v = op;
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*--v = op;
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*--v = op;
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*--v = op;
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*--v = op;
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*--v = op;
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*--v = op;
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*--v = op;
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*--v = op;
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*--v = op;
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*--v = op;
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*--v = op;
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*--v = op;
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*--v = op;
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*--v = op;
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*--v = op;
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}
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dma_memset(vram, (color << 16) | color, 396 * 224 * 2);
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return;
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}
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