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ld: merge XRAM and YRAM into a single 16-kiB section
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parent
26c5b76037
commit
8210524152
4 changed files with 20 additions and 47 deletions
28
fx9860g.ld
28
fx9860g.ld
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@ -35,8 +35,7 @@ MEMORY
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/* On-chip IL memory */
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/* On-chip IL memory */
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ilram (rwx): o = 0xe5200000, l = 4k
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ilram (rwx): o = 0xe5200000, l = 4k
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/* On-chip X and Y memory */
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/* On-chip X and Y memory */
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xram (rwx): o = 0xe5007000, l = 8k
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xyram (rwx): o = 0xe500e000, l = 16k
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yram (rwx): o = 0xe5017000, l = 8k
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}
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}
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SECTIONS
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SECTIONS
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@ -188,29 +187,18 @@ SECTIONS
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. = ALIGN(16);
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. = ALIGN(16);
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} > ilram AT> rom
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} > ilram AT> rom
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. = ORIGIN(xram);
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. = ORIGIN(xyram);
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.xram ALIGN(4) : ALIGN(4) {
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.xyram ALIGN(4) : ALIGN(4) {
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_lxram = LOADADDR(.xram);
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_lxyram = LOADADDR(.xyram);
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_rxram = . ;
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_rxyram = . ;
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*(.xram)
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*(.xram .yram .xyram)
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. = ALIGN(16);
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. = ALIGN(16);
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} > xram AT> rom
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} > xyram AT> rom
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. = ORIGIN(yram);
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.yram ALIGN(4) : ALIGN(4) {
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_lyram = LOADADDR(.yram);
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_ryram = . ;
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*(.yram)
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. = ALIGN(16);
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} > yram AT> rom
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_silram = SIZEOF(.ilram);
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_silram = SIZEOF(.ilram);
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_sxram = SIZEOF(.xram);
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_sxyram = SIZEOF(.xyram);
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_syram = SIZEOF(.yram);
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29
fxcg50.ld
29
fxcg50.ld
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@ -21,8 +21,7 @@ MEMORY
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/* On-chip IL memory */
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/* On-chip IL memory */
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ilram (rwx): o = 0xe5200000, l = 4k
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ilram (rwx): o = 0xe5200000, l = 4k
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/* On-chip X and Y memory */
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/* On-chip X and Y memory */
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xram (rwx): o = 0xe5007000, l = 8k
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xyram (rwx): o = 0xe500e000, l = 16k
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yram (rwx): o = 0xe5017000, l = 8k
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}
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}
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SECTIONS
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SECTIONS
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@ -102,7 +101,6 @@ SECTIONS
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.bss (NOLOAD) : {
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.bss (NOLOAD) : {
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_rbss = . ;
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_rbss = . ;
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*(.bss.vram)
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*(.bss COMMON)
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*(.bss COMMON)
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. = ALIGN(16);
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. = ALIGN(16);
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@ -144,29 +142,18 @@ SECTIONS
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. = ALIGN(16);
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. = ALIGN(16);
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} > ilram AT> rom
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} > ilram AT> rom
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. = ORIGIN(xram);
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. = ORIGIN(xyram);
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.xram ALIGN(4) : ALIGN(4) {
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.xyram ALIGN(4) : ALIGN(4) {
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_lxram = LOADADDR(.xram);
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_lxyram = LOADADDR(.xyram);
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_rxram = . ;
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_rxyram = . ;
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*(.xram)
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*(.xram .yram .xyram)
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. = ALIGN(16);
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. = ALIGN(16);
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} > xram AT> rom
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} > xyram AT> rom
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. = ORIGIN(yram);
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.yram ALIGN(4) : ALIGN(4) {
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_lyram = LOADADDR(.yram);
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_ryram = . ;
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*(.yram)
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. = ALIGN(16);
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} > yram AT> rom
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_silram = SIZEOF(.ilram);
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_silram = SIZEOF(.ilram);
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_sxram = SIZEOF(.xram);
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_sxyram = SIZEOF(.xyram);
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_syram = SIZEOF(.yram);
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/* gint's uninitialized BSS section, going to static RAM. All the large
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/* gint's uninitialized BSS section, going to static RAM. All the large
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data arrays will be located here */
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data arrays will be located here */
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@ -14,8 +14,8 @@
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#define GBSS3 __attribute__((section(".gint.bss.sh3")))
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#define GBSS3 __attribute__((section(".gint.bss.sh3")))
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/* Objects for the ILRAM, XRAM and YRAM regions */
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/* Objects for the ILRAM, XRAM and YRAM regions */
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#define GILRAM __attribute__((section(".ilram")))
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#define GILRAM __attribute__((section(".ilram")))
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#define GXRAM __attribute__((section(".xram")))
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#define GXRAM __attribute__((section(".xyram")))
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#define GYRAM __attribute__((section(".yram")))
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#define GYRAM __attribute__((section(".xyram")))
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/* Unused parameters or variables */
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/* Unused parameters or variables */
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#define GUNUSED __attribute__((unused))
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#define GUNUSED __attribute__((unused))
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@ -23,8 +23,7 @@ extern uint32_t
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brom, srom, /* Limits of ROM mappings */
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brom, srom, /* Limits of ROM mappings */
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ldata, sdata, rdata, /* User's data section */
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ldata, sdata, rdata, /* User's data section */
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lilram, silram, rilram, /* IL memory section */
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lilram, silram, rilram, /* IL memory section */
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lxram, sxram, rxram, /* X memory section */
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lxyram, sxyram, rxyram, /* X and Y memory section */
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lyram, syram, ryram, /* Y memory section */
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sbss, rbss; /* User's BSS section */
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sbss, rbss; /* User's BSS section */
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#ifdef FX9860G
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#ifdef FX9860G
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extern uint32_t
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extern uint32_t
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@ -151,8 +150,7 @@ int start(int isappli, int optnum)
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if(!isSH3())
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if(!isSH3())
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{
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{
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regcpy(&lilram, &silram, &rilram);
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regcpy(&lilram, &silram, &rilram);
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regcpy(&lxram, &sxram, &rxram);
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regcpy(&lxyram, &sxyram, &rxyram);
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regcpy(&lyram, &syram, &ryram);
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}
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}
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#ifdef FX9860G
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#ifdef FX9860G
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