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https://git.planet-casio.com/Lephenixnoir/gint.git
synced 2024-12-28 20:43:36 +01:00
cpg, power: improve peripheral register descriptions
The POWER and CPG modules have been reverse-engineered by Yatis.
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parent
19951ccf62
commit
858ec8aa12
2 changed files with 50 additions and 28 deletions
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@ -54,7 +54,17 @@ typedef volatile struct
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uint32_t :4;
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uint32_t P1FC :4; /* Pphi divider 1 [*] */
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);
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pad(0x20);
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pad(0x4);
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lword_union(FSICLKCR,
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uint32_t :16;
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uint32_t DIVB :6; /* Division ratio for port B */
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uint32_t :1;
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uint32_t CLKSTP :1; /* Clock Stop */
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uint32_t SRC :2; /* Clock source select */
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uint32_t DIVA :6; /* Division ratio for port A */
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);
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pad(0x18);
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lword_union(PLLCR,
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uint32_t :17;
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@ -65,8 +75,17 @@ typedef volatile struct
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uint32_t CKOFF :1; /* CKO Output Stop */
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uint32_t :1;
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);
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pad(0x14);
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lword_union(SPUCLKCR,
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uint32_t :23;
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uint32_t CLKSTP :1; /* Clock Stop */
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uint32_t _ :1; /* Unknown */
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uint32_t :1;
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uint32_t DIV :6; /* Division ratio */
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);
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pad(0x4);
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pad(0x1c);
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lword_union(SSCGCR,
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uint32_t SSEN :1; /* Spread Spectrum Enable */
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uint32_t :31;
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@ -37,8 +37,8 @@ typedef volatile struct
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uint32_t RS :1;
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uint32_t IL :1;
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uint32_t SndCache :1;
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uint32_t _unknown1 :1;
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uint32_t :1;
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uint32_t FPU :1;
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uint32_t :1;
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uint32_t INTC :1;
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@ -53,41 +53,44 @@ typedef volatile struct
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uint32_t CMT :1;
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uint32_t RWDT :1;
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uint32_t DMAC1 :1;
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uint32_t :1;
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uint32_t TMU1 :1;
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uint32_t SCIF0 :1;
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uint32_t SCIF1 :1;
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uint32_t :4;
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uint32_t SCIF2 :1;
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uint32_t SCIF3 :1;
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uint32_t SCIF4 :1;
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uint32_t SCIF5 :1;
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uint32_t :1;
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uint32_t SCIF :1;
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uint32_t KEYSC :1;
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uint32_t RTC :1;
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uint32_t :2;
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uint32_t MSIOF0 :1;
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uint32_t MSIOF1 :1;
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uint32_t :1;
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);
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/* Module Stop Control Register 1 */
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lword_union(MSTPCR1,
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uint32_t :19;
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uint32_t KEYSC :1;
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uint32_t RTC :1;
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uint32_t :1;
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uint32_t I2C0 :1;
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uint32_t I2C1 :1;
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uint32_t :8;
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);
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/* Module Stop Control Register 2
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I stripped down this one to remove any fancy modules from the SH7724
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that are unlikely to even be present in the SH7305. */
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The list was established by Yatis. See <https://bible.planet-casio.
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com/yatis/hardware/sh7305/power.html>. */
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lword_union(MSTPCR2,
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uint32_t :2;
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uint32_t MMC :1;
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uint32_t :1;
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uint32_t ADC :1;
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uint32_t :6;
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uint32_t TPU :1;
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uint32_t :4;
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uint32_t USB0 :1;
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uint32_t :20;
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uint32_t :2;
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uint32_t SDC :1;
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uint32_t :2;
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uint32_t FLCTL :1;
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uint32_t ECC :1;
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uint32_t :1;
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uint32_t I2C :1;
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uint32_t :1;
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uint32_t SPU :1;
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uint32_t _unknown2 :1;
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uint32_t :1;
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uint32_t LCDC :1;
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uint32_t _unknown3 :1;
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uint32_t Cmod :1;
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uint32_t :1;
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uint32_t Cmod2A :1;
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uint32_t :2;
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);
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pad(4);
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