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core: remove some useless hardware info

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Lephe 2020-06-20 19:23:50 +02:00
parent 4a0fc65c34
commit a91a0a483b
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GPG key ID: 1BBA026E13FC0495
6 changed files with 5 additions and 63 deletions
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55
include/gint/hardware.h
View file

@ -57,16 +57,11 @@ void hw_detect(void);
#define HWCALC 3 /* Calculator model */
#define HWRAM 4 /* Amount of RAM */
#define HWROM 5 /* Amount of ROM */
#define HWMMU 6 /* Memory Management Unit */
#define HWURAM 7 /* Userspace RAM (set iff HWMMU is loaded) */
#define HWCPG 8 /* Clock Pulse Generator */
#define HWDMA 9 /* Direct Memory Access Controller */
#define HWTMU 10 /* Timer Unit */
#define HWETMU 11 /* Extra Timer Units */
#define HWRTC 12 /* Real-Time Clock */
#define HWKBD 13 /* Keyboard */
#define HWKBDSF 14 /* Keyboard Scan Frequency (set iff HWKBD is loaded) */
#define HWDD 15 /* Display Driver */
#define HWURAM 6 /* Userspace RAM */
#define HWETMU 7 /* Extra Timer Units */
#define HWKBD 8 /* Keyboard */
#define HWKBDSF 9 /* Keyboard Scan Frequency (set iff HWKBD is loaded) */
#define HWDD 10 /* Display Driver */
/*
** MPU type
@ -100,39 +95,6 @@ void hw_detect(void);
/* fx-CG 50, a late extension to the Prizm family */
#define HWCALC_FXCG50 5
/*
** Memory Management Unit
*/
/* MMU has a unified TLB. Essentially correlated with SH4. */
#define HWMMU_UTLB 0x01
/* Add-in is fully mapped in the TLB. This means that gint needs not handle TLB
misses as exceptions. This should generally be set on fx9860g, but not on
fxcg50. */
#define HWMMU_FITTLB 0x02
/*
** Clock Pulse Generator
*/
/* Input clock frequency is known for this model and all frequencies are
computed (they used to be measured from the RTC). Should be 1 */
#define HWCPG_COMP 0x01
/* Used an extended CPG interface, correlated with SH4 */
#define HWCPG_EXT 0x02
/*
** Direct Memory Access Controller
*/
/* Nothing other than the HW_LOADED bit yet */
/*
** Timer Unit
*/
/* Nothing other than the HW_LOADED bit yet */
/*
** Extra Timer Units
*/
@ -151,13 +113,6 @@ void hw_detect(void);
#define HWETMU_OK4 0x40
#define HWETMU_OK5 0x80
/*
** Real-Time Clock
*/
/* The RTC timer is enabled */
#define HWRTC_TIMER 0x01
/*
** Keyboard
*/

2
src/core/mmu.c
View file

@ -50,7 +50,6 @@ void tlb_mapped_memory(uint32_t *p_rom, uint32_t *p_ram)
if(p_rom) *p_rom = rom;
if(p_ram) *p_ram = ram;
gint[HWMMU] = HW_LOADED;
gint[HWURAM] = ram;
}
@ -97,6 +96,5 @@ void utlb_mapped_memory(uint32_t *p_rom, uint32_t *p_ram)
if(p_rom) *p_rom = rom;
if(p_ram) *p_ram = ram;
gint[HWMMU] = HW_LOADED | HWMMU_UTLB;
gint[HWURAM] = ram;
}

6
src/cpg/cpg.c
View file

@ -64,8 +64,6 @@ static void sh7705_probe(void)
freq.Bphi_f = ckio;
freq.Iphi_f = (idiv == 3) ? ckio_3 : ckio >> idiv;
freq.Pphi_f = (pdiv == 3) ? ckio_3 : ckio >> pdiv;
gint[HWCPG] |= HWCPG_COMP;
}
#undef CPG
@ -110,8 +108,6 @@ static void sh7305_probe(void)
freq.Bphi_f = base >> (divb + 1);
freq.Iphi_f = base >> (divi + 1);
freq.Pphi_f = base >> (divp + 1);
gint[HWCPG] |= HWCPG_COMP | HWCPG_EXT;
}
#undef CPG
@ -122,8 +118,6 @@ static void sh7305_probe(void)
static void init(void)
{
gint[HWCPG] = HW_LOADED;
/* This avoids warnings about sh7705_probe() being undefined when
building for fxcg50 */
#if defined(FX9860G) || (!defined(FX9860G) && !defined(FXCG50))

2
src/dma/dma.c
View file

@ -213,8 +213,6 @@ static void init(void)
DMA.OR.AE = 0;
DMA.OR.NMIF = 0;
DMA.OR.DME = 1;
gint[HWDMA] = HW_LOADED;
}
static void wait(void)

2
src/rtc/rtc.c
View file

@ -149,8 +149,6 @@ static void init(void)
/* Disable the periodic interrupt for now, but give it priority 5 */
RTC->RCR2.PES = RTC_NONE;
intc_priority(INTC_RTC_PRI, 5);
gint[HWRTC] = HW_LOADED | HWRTC_TIMER;
}
//---

1
src/tmu/tmu.c
View file

@ -301,7 +301,6 @@ static void init(void)
/* Record details in gint's hardware information interface */
gint[HWTMU] = HW_LOADED;
gint[HWETMU] = HW_LOADED | (isSH3() ? HWETMU_1 : HWETMU_6);
for(int i = 0; i < timer_count() - 3; i++)