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dma: add an asynchronous API
This change adds asynchronous capabilities to the DMA API. Previously, transfers would start asynchronously but could only be completed by a call to dma_transfer_wait(). The API now supports a callback, as well as the dma_transfer_sync() variant, to be consistent with the upcoming USB API that has both _sync and _async versions of functions. The interrupt handler of the DMA was changed to include a return to userland, which is required to perform the callback. * dma_transfer() is now an obsolete synonym for dma_transfer_async() with no callback. * dma_transfer_noint() is now a synonym for dma_transfer_atomic(), for consistency with the upcoming USB API.
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Lephe
parent
42081c9968
commit
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6 changed files with 103 additions and 82 deletions
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@ -6,6 +6,7 @@
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#define GINT_DMA
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#include <gint/defs/types.h>
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#include <gint/defs/call.h>
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/* dma_size_t - Transfer block size */
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typedef enum
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@ -38,11 +39,12 @@ typedef enum
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} dma_address_t;
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/* dma_transfer() - Start a data transfer on channel 0
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This function returns just when the transfer starts. The transfer will end
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later on and the DMA will be stopped by an interrupt. Call
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dma_transfer_wait() if you need to wait for the transfer to finish. Don't
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start a new transfer until the current one is finished!
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/* dma_transfer_async(): Perform an asynchronous DMA data transfer
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This function starts a DMA data transfer and returns immediately. The
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provided callback will be invoked once the transfer is finish. You can also
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call dma_transfer_wait() to wait until the transfer completes. You can
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create a callback with GINT_CALL() or pass GINT_CALL_NULL.
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@channel DMA channel (0..5)
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@size Transfer size
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@ -50,32 +52,40 @@ typedef enum
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@src Source pointer, must be aligned with transfer size
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@src_mode Source address mode
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@dst Destination address, must be aligned with transfer size
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@dst_mode Destination address mode */
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void dma_transfer(int channel, dma_size_t size, uint length,
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void const *src, dma_address_t src_mode,
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void *dst, dma_address_t dst_mode);
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/* dma_transfer_wait() - Wait for a transfer to finish
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You should call this function when you need to transfer to be complete
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before continuing execution. If you are sure that the transfer is finished,
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this is not necessary (the only way to know is to look at the DMA registers
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or record interrupts).
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@dst_mode Destination address mode
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@callback Function to invoke when the transfer finishes
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-> Returns true on success. */
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bool dma_transfer_async(int channel, dma_size_t size, uint length,
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void const *src, dma_address_t src_mode, void *dst,
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dma_address_t dst_mode, gint_call_t callback);
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/* dma_transfer_wait(): Wait for an asynchronous transfer to finish
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@channel DMA channel (0..5) */
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void dma_transfer_wait(int channel);
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/* dma_transfer_noint() - Perform a data transfer without interrupts
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This function performs a transfer much like dma_transfer(), but doesn't use
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interrupts and *actively waits* for the transfer to finish, returning when
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it's finished. Don't call dma_transfer_wait() after using this function.
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/* dma_transfer_sync(): Perform an synchronous DMA data transfer
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Like dma_transfer_async(), but only returns once the transfer completes. */
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bool dma_transfer_sync(int channel, dma_size_t size, uint length,
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void const *src, dma_address_t src_mode, void *dst,
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dma_address_t dst_mode);
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Not using interrupts is a bad design idea for a majority of programs, and is
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only ever needed to display panic messages inside exception handlers. */
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void dma_transfer_noint(int channel, dma_size_t size, uint blocks,
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/* dma_transfer_atomic(): Perform a data transfer without interrupts
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This function performs a transfer much like dma_transfer_sync(), but doesn't
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use interrupts and actively waits for the transfer to finish. Not using
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interrupts is a bad design idea for a majority of programs, and is only ever
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needed to display panic messages inside exception handlers. */
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void dma_transfer_atomic(int channel, dma_size_t size, uint blocks,
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void const *src, dma_address_t src_mode,
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void *dst, dma_address_t dst_mode);
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/* Deprecated version of dma_transfer_async() that did not have a callback */
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__attribute__((deprecated("Use dma_transfer_async() instead")))
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void dma_transfer(int channel, dma_size_t size, uint length, void const *src,
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dma_address_t src_mode, void *dst, dma_address_t dst_mode);
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/* Old name for dma_transfer_atomic() */
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#define dma_transfer_noint dma_transfer_atomic
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//---
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// DMA-based memory manipulation functions
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//---
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@ -14,6 +14,9 @@
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typedef volatile sh7305_dma_channel_t channel_t;
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/* Callbacks for all channels */
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static gint_call_t dma_callbacks[6] = { 0 };
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/* dma_channel(): Get address of a DMA channel */
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static channel_t *dma_channel(int channel)
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{
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@ -60,8 +63,8 @@ static uint32_t dma_translate(void const *address)
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//---
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/* dma_setup(): Setup the DMA in interrupt or no-interrupt mode.
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The first parameters are as for dma_transfer() and dma_transfer_noint(). The
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last parameter indicates whether interrupts should be used.
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The first parameters are as for dma_transfer() and dma_transfer_atomic().
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The last parameter indicates whether interrupts should be used.
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Returns non-zero if the DMA is busy or a configuration error occurs. */
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static int dma_setup(int channel, dma_size_t size, uint blocks,
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void const *src, dma_address_t src_mode,
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@ -103,17 +106,36 @@ static int dma_setup(int channel, dma_size_t size, uint blocks,
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return 0;
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}
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/* dma_transfer(): Perform a data transfer */
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void dma_transfer(int channel, dma_size_t size, uint blocks,
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void const *src, dma_address_t src_mode,
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void *dst, dma_address_t dst_mode)
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bool dma_transfer_async(int channel, dma_size_t size, uint blocks,
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void const *src, dma_address_t src_mode, void *dst,
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dma_address_t dst_mode, gint_call_t callback)
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{
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if(dma_setup(channel, size, blocks, src, src_mode, dst, dst_mode, 1))
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return;
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return false;
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dma_callbacks[channel] = callback;
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/* Enable channel, starting the DMA transfer. */
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channel_t *ch = dma_channel(channel);
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ch->CHCR.DE = 1;
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return true;
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}
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/* Interrupt handler for all finished DMA transfers */
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static void dma_interrupt_transfer_ended(int channel)
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{
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channel_t *ch = dma_channel(channel);
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ch->CHCR.DE = 0;
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ch->CHCR.TE = 0;
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DMA.OR.AE = 0;
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DMA.OR.NMIF = 0;
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if(dma_callbacks[channel].function)
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{
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gint_call(dma_callbacks[channel]);
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dma_callbacks[channel] = GINT_CALL_NULL;
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}
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}
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/* dma_transfer_wait(): Wait for a transfer to finish */
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@ -144,8 +166,18 @@ void dma_transfer_wait(int channel)
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}
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}
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/* dma_transfer_noint(): Perform a data transfer without interruptions */
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void dma_transfer_noint(int channel, dma_size_t size, uint blocks,
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bool dma_transfer_sync(int channel, dma_size_t size, uint length,
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void const *src, dma_address_t src_mode, void *dst,
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dma_address_t dst_mode)
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{
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if(!dma_transfer_async(channel, size, length, src, src_mode, dst,
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dst_mode, GINT_CALL_NULL)) return false;
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dma_transfer_wait(channel);
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return true;
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}
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/* dma_transfer_atomic(): Perform a data transfer without interruptions */
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void dma_transfer_atomic(int channel, dma_size_t size, uint blocks,
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void const *src, dma_address_t src_mode,
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void *dst, dma_address_t dst_mode)
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{
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@ -169,6 +201,14 @@ void dma_transfer_noint(int channel, dma_size_t size, uint blocks,
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DMA.OR.NMIF = 0;
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}
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/* Deprecated version of dma_transfer_async() that did not have a callback */
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void dma_transfer(int channel, dma_size_t size, uint length, void const *src,
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dma_address_t src_mode, void *dst, dma_address_t dst_mode)
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{
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dma_transfer_async(channel, size, length, src, src_mode, dst, dst_mode,
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GINT_CALL_NULL);
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}
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//---
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// Initialization
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//---
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@ -183,14 +223,11 @@ static void configure(void)
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for(int i = 0; i < 6; i++)
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{
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/* Install interrupt handler */
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void *h = intc_handler(codes[i], inth_dma_te, 32);
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channel_t *ch = dma_channel(i);
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intc_handler_function(codes[i],
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GINT_CALL(dma_interrupt_transfer_ended, i));
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/* Set its CHCR address */
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*(volatile uint32_t **)(h + 24) = &ch->CHCR.lword;
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/* Clear the enable flag */
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ch->CHCR.DE = 0;
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/* Disable the channel */
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dma_channel(i)->CHCR.DE = 0;
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}
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/* Install the address error gate */
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@ -1,37 +1,14 @@
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/*
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** gint:dma:inth - Interrupt handler for the DMA
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** An easy one, just clears some flags and marks all transfers as finished.
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** gint:dma:inth - DMA address error handler
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** A particular handler that jumps into a panic.
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*/
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.global _inth_dma_te
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.global _inth_dma_ae
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.global _inth_dma_ae /* 32 bytes */
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.section .gint.blocks, "ax"
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.align 4
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/* DMA TRANSFER ENDED INTERRUPT HANDLER - 32 BYTES */
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_inth_dma_te:
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/* Clear the TE flag and DMA Enable in CHCR */
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mov.l 1f, r1
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mov.l @r1, r0
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mov #-4, r2
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and r2, r0
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mov.l r0, @r1
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/* Clear the AE and NMIF flags in OR */
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mov.l 2f, r1
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mov.w @r1, r0
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mov #-7, r2
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and r2, r0
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mov.w r0, @r1
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rts
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nop
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1: .long 0 /* CHCR, set dynamically */
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2: .long 0xfe008060 /* DMA.OR */
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/* DMA ADDRESS ERROR INTERRUPT HANDLER - 18 BYTES */
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/* DMA ADDRESS ERROR INTERRUPT HANDLER - 22 BYTES */
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_inth_dma_ae:
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/* Manually RTE into the panic routine, preserving SPC */
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@ -4,8 +4,6 @@
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void *dma_memcpy(void * __restrict dst, const void * __restrict src,
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size_t size)
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{
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dma_transfer(1, DMA_32B, size >> 5, src, DMA_INC, dst, DMA_INC);
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dma_transfer_wait(1);
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dma_transfer_sync(1, DMA_32B, size >> 5, src, DMA_INC, dst, DMA_INC);
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return dst;
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}
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@ -14,7 +14,6 @@ void *dma_memset(void *dst, uint32_t l, size_t size)
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different memory regions, making the DMA faster than the CPU. */
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for(int i = 0; i < 8; i++) ILbuf[i] = l;
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dma_transfer(1, DMA_32B, size >> 5, ILbuf, DMA_FIXED, dst, DMA_INC);
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dma_transfer_wait(1);
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dma_transfer_sync(1, DMA_32B, size>>5, ILbuf, DMA_FIXED, dst, DMA_INC);
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return dst;
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}
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@ -150,18 +150,18 @@ void r61524_display(uint16_t *vram, int start, int height, int method)
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appear. */
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int blocks = 99 * (height >> 2);
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/* Now roll! */
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if(method == R61524_DMA)
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{
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/* If the previous transfer is still running, wait for it */
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if(method == R61524_DMA) {
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/* If the previous transfer is still running, wait for it; then
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start sending asynchronously and return. */
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dma_transfer_wait(0);
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/* Usa a normal, interrupt-based transfer */
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dma_transfer(0, DMA_32B, blocks, src, DMA_INC, dst, DMA_FIXED);
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/* Function returns early so that rendering can continue on
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another VRAM while the transfer is still being done */
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dma_transfer_async(0, DMA_32B, blocks, src, DMA_INC, dst,
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DMA_FIXED, GINT_CALL_NULL);
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}
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else {
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/* Transfer atomically */
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dma_transfer_atomic(0, DMA_32B, blocks, src, DMA_INC, dst,
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DMA_FIXED);
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}
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else dma_transfer_noint(0, DMA_32B, blocks, src,DMA_INC,dst,DMA_FIXED);
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}
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//---
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