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kernel: move VBR to user RAM on fx9860g
This change puts an end to the illegal occupation of some random RAM area, solving most of the return-to-menu issues, including (but not limited to) random key presses, multiple return, and VBR being overwritten. There are still known return-to-menu issues on SH3 (mainly just GetKeyWait() returning immediately to gint probably due to multiple KEY_CTRL_MENU being injected), but nothing crashy.
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parent
0aceb6f93e
commit
b2f580a009
1 changed files with 22 additions and 24 deletions
46
fx9860g.ld
46
fx9860g.ld
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@ -15,12 +15,14 @@ MEMORY
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{
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{
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/* Userspace mapping of the add-in (G1A header takes 0x200 bytes) */
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/* Userspace mapping of the add-in (G1A header takes 0x200 bytes) */
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rom (rx): o = 0x00300200, l = 500k
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rom (rx): o = 0x00300200, l = 500k
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/* This is mapped to RAM; 8k on SH3, apparently 32k on SH4 */
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/* This is mapped to RAM; 8k on SH3, 32k on SH4. Since gint uses the
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ram (rw): o = 0x08100000, l = 8k
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last 2k for its VBR and mapped code, 6k are left */
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/* gint's VBR space, mentioned here for completeness */
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ram (rw): o = 0x08100200, l = 6k
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vbr (rwx): o = 0x8800e000, l = 5k
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/* This is the VBR space. The [ram] region is mapped to 8801c000. This
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/* Some RAM region from P1 area; gint's data will reside here */
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region is used at load time and mentioned here for completeness */
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rram (rwx): o = 0x8800f400, l = 3k
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vbr (rwx): o = 0x8801da00, l = 1536
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/* These first bits of RAM are used for gint's perma-mapped code */
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rram (rwx): o = 0x8801c000, l = 512
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/* On-chip IL memory */
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/* On-chip IL memory */
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ilram (rwx): o = 0xe5200000, l = 4k
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ilram (rwx): o = 0xe5200000, l = 4k
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/* On-chip X and Y memory */
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/* On-chip X and Y memory */
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@ -133,13 +135,15 @@ SECTIONS
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/* Read-write data going to RAM:
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/* Read-write data going to RAM:
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- Data sections generated by the compiler (.data and .data.*)
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- Data sections generated by the compiler (.data and .data.*)
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- Data sections from fxlib, "D" */
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- Data sections from fxlib, "D"
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- Data sections from gint (.gint.data) */
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.data ALIGN(4) : ALIGN(4) {
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.data ALIGN(4) : ALIGN(4) {
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_ldata = LOADADDR(.data);
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_ldata = LOADADDR(.data);
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_rdata = . ;
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_rdata = . ;
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*(.data .data.*)
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*(.data .data.*)
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*(D)
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*(D)
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*(.gint.data .gint.data.sh3)
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. = ALIGN(16);
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. = ALIGN(16);
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} > ram AT> rom
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} > ram AT> rom
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@ -152,6 +156,16 @@ SECTIONS
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_sdata = SIZEOF(.data) + SIZEOF(.data.4);
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_sdata = SIZEOF(.data) + SIZEOF(.data.4);
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/* gint's uninitialized BSS section */
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.gint.bss (NOLOAD) : {
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/* Since it's uninitialized, the location doesn't matter */
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*(.gint.bss)
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. = ALIGN(16);
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} > ram :NONE
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_sgbss = SIZEOF(.gint.bss);
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/* On-chip memory sections: IL, X and Y memory */
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/* On-chip memory sections: IL, X and Y memory */
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. = ORIGIN(ilram);
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. = ORIGIN(ilram);
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@ -192,8 +206,6 @@ SECTIONS
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/*
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/*
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** RRAM sections
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** RRAM sections
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** 8800e000:5k VBR space
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** 8800f400:3k .gint.data and .gint.bss
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*/
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*/
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/* VBR address: let's just start at the beginning of the RRAM area.
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/* VBR address: let's just start at the beginning of the RRAM area.
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@ -204,14 +216,11 @@ SECTIONS
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. = ORIGIN(rram);
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. = ORIGIN(rram);
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/* gint's data section, going to Real RAM. This section contains many
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/* Code that must remain permanently mapped (.gint.mapped) */
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small objects from the library (static/global variables, etc) */
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.gint.data ALIGN(4) : ALIGN(4) {
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.gint.data ALIGN(4) : ALIGN(4) {
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_lgdata = LOADADDR(.gint.data);
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_lgdata = LOADADDR(.gint.data);
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_rgdata = . ;
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_rgdata = . ;
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*(.gint.data .gint.data.*)
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/* Also code that must remain permanently mapped! */
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/* Also code that must remain permanently mapped! */
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*(.gint.mapped)
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*(.gint.mapped)
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@ -220,17 +229,6 @@ SECTIONS
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_sgdata = SIZEOF(.gint.data);
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_sgdata = SIZEOF(.gint.data);
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/* gint's uninitialized BSS section, going to Real RAM. All the large
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data arrays will be located here */
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.gint.bss (NOLOAD) : {
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/* Since it's uninitialized, the location doesn't matter */
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*(.gint.bss .gint.bss.*)
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. = ALIGN(16);
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} > rram :NONE
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_sgbss = SIZEOF(.gint.bss);
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/*
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/*
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