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minor API comment update
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2 changed files with 14 additions and 18 deletions
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@ -70,31 +70,27 @@ typedef image_t bopti_image_t;
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// Video RAM management
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//---
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/* dsetvram() - Control video RAM address and triple buffering
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/* dsetvram(): Control video RAM address and triple buffering
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Normal rendering under gint uses double-buffering: there is one image
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displayed on the screen and one in memory, in a region called the video RAM
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(VRAM). The application draws frames in the VRAM then sends them to the
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screen only when they are finished, using dupdate().
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On fxcg50, the performance bottleneck is almost always the graphical
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rendering (especially in games) because the high amount of data, 173 kB per
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frame in full-resolution, makes graphics manipulation computationally
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expensive. The transfer also takes about 10 ms in itself.
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On fx-CG, sending frames with dupdate() is a common bottleneck because it
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takes about 11 ms. Fortunately, while the DMA is sending the frame to the
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display, the CPU is available to do work in parallel. This function sets up
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triple buffering (ie. a second VRAM) so that the CPU can start working on
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the next frame while the DMA is sending the current one.
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Since gint transfers data to the screen using the DMA, it is possible to run
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the application while the finished frame is being transferred. However,
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writing to the VRAM during this period will cause display artifacts since
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the VRAM it is still being read by the DMA.
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However, experience shows minimal performance improvements, because writing
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to main RAM does not parallelize with DMA transfers. Since gint 2.8, this
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is no longer the default, and the memory for the extra VRAM is instead
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available via malloc().
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The solution to this is to use triple-buffering with the display and two
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VRAMs that are alternately being written to while the other is being
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transferred. The VRAM switching is handled by dupdate() and is activated
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whenever two VRAMs are configured.
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By default gint uses triple buffering with two VRAMs in the system stack.
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VRAMs must be contiguous, 32-aligned, (2*396*224)-byte buffers.
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VRAMs must be contiguous, 32-aligned, (2*396*224)-byte buffers with 32 bytes
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of extra data on each side (ie. 32 bytes into a 32-aligned buffer of size
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177472).
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@main Main VRAM area, used alone if [secondary] is NULL
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@secondary Additional VRAM area, enables triple buffering if non-NULL */
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@ -178,7 +178,7 @@ static void dma_channel_wait(int channel, bool foreign)
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if(!ch) return;
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/* If interrupts are disabled or we don't own the device, spin-wait by
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checking either for TE to be set (Transfere Ended) or DE to be gone
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checking either for TE to be set (Transfer Ended) or DE to be gone
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(channel disabled).
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There are definitely race conditions if the DMA is restarted between
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