Commit graph

15 commits

Author SHA1 Message Date
Lephe
da05e89b1c
gint: disable restart on fx-CP
There is no return-to-menu so enabling it would just loop.
2024-06-04 17:58:16 +02:00
Lephe
335326692f
meta: add LTO support and enable it by default
* Set -flto
* Use gcc-ar to build the archive so the LTO plugin is loaded and LTO
  sections aren't stripped off the object files
* Slightly conservative KEEP()s in the linker script (not required but
  I'm paranoid)
* Make the drivers __attribute__((externall_visible)) so they are
  generated by the link-time back-end and not left in the archive
* Remove the unused isappli/optnum parameters of main, which have been
  unused for years, are irrelevant on fx-CG and lead to a link-time
  warning with LTO. I'll add APIs to access them later.
2024-05-26 18:16:31 +02:00
Lephe
789ba7caa5
gint: basic support for fx-CP 400 programs with HollyHock 2 loading
Features will come in slowly while I restructure for gint 3. With this
third big target for gint, the legacy aspects of gint 2's structure and
API are getting felt, so a major revision will be in order.

See the TODO file at this commit for info on what works and not.
2024-04-16 15:53:10 +02:00
Lephe
3a42b5d386
gint: switch away from FX9860G/FXCG50 macros
Not changing much for now, just distilling them into hardware/OS/render
macros. Later on the rendering stuff will become more dynamic and down
the line I want to unify the APIs more.
2024-03-24 08:28:22 +01:00
Lephe
5ff6a518f6
gint: memory micro-optimizations 2024-03-19 19:03:17 +01:00
Lephe
5655699cd8
gint: reload on-chip sections after world, with option to backup (#26)
Solves the power off crash, at least for programs that don't store
long-term data in on-chip memory.
2024-01-16 11:07:41 +01:00
Lephe
3e5c45c5ad
kernel: make gint_setrestart() reset everything 2022-09-02 22:29:19 +02:00
Lephe
8210524152
ld: merge XRAM and YRAM into a single 16-kiB section 2022-05-04 19:08:54 +01:00
Lephe
850544349c
kernel: implement _Exit to support exit 2021-05-29 16:29:50 +02:00
Lephe
74b2dbeb36
string: use __restrict instead of restrict for C++ compatibility 2021-04-27 14:48:34 +02:00
Lephe
078edb50b2
small cleanup 2020-10-05 16:31:37 +02:00
Lephe
9b462deca1
kernel: preload add-in to TLB on SH3 (UNSTABLE) (#12) 2020-09-28 14:09:03 +02:00
Lephe
e66b9083b4
kernel: do not copy data to on-chip memory on SH3
Avoids a crash at startup, but the application needs to be smart enough
to not use the data.
2020-09-28 14:06:29 +02:00
Lephe
e5abe03b89
kernel: dynamic loading of GMAPPED functions to user RAM
This commit introduces a large architectural change. Unlike previous
models of the fx-9860G series, the G-III models have a new user RAM
address different from 8801c000. The purpose of this change is to
dynamically load GMAPPED functions to this address by querying the TLB,
and call them through a function pointer whose address is determined
when loading.

Because of the overhead of using a function pointer in both assembly and
C code, changes have been made to avoid GMAPPED functions altogether.
Current, only cpu_setVBR() and gint_inth_callback() are left, the second
being used specifically to enable TLB misses when needed.

* Add a .gint.mappedrel section for the function pointers holding
  addresses to GMAPPED functions; add function pointers for
  cpu_setVBR() and gint_inth_callback()
* Move rram to address 0 instead of the hardcoded 0x8801c000
* Load GMAPPED functions at their linked address + the physical address
  user RAM is mapped, to and compute their function pointers
* Remove the GMAPPED macro since no user function needs it anymore
* Add section flags "ax" (code) or "aw" (data) to every custom .section
  in assembler code, as they default to unpredictable values that can
  cause the section to be marked NOLOAD by the linker
* Update the main kernel, TMU, ETMU and RTC interrupt handlers to use
  the new indirect calling method

This is made possible by new MMU functions giving direct access to the
physical area behind any virtualized page.

* Add an mmu_translate() function to query the TLB
* Add an mmu_uram() function to access user RAM from P1

The exception catching mechanism has been modified to avoid the use of
GMAPPED functions altogether.

* Set SR.BL=0 and SR.IMASK=15 before calling exception catchers
* Move gint_exc_skip() to normal text ROM
* Also fix registers not being popped off the stack before a panic

The timer drivers have also been modified to avoid GMAPPED functions.

* Invoke timer_stop() through gint_inth_callback() and move it to ROM
* Move and expand the ETMU driver to span 3 blocks at 0xd00 (ETMU4)
* Remove the timer_clear() function by inlining it into the ETMU handler
  (TCR is provided within the storage block of each timer)
* Also split src/timer/inth.s into src/timer/inth-{tmu,etmu}.s

Additionally, VBR addresses are now determined at runtime to further
reduce hardcoded memory layout addresses in the linker script.

* Determine fx-9860G VBR addresses dynamically from mmu_uram()
* Determine fx-CG 50 VBR addresses dynamically from mmu_uram()
* Remove linker symbols for VBR addresses

Comments and documentation have been updated throughout the code to
reflect the changes.
2020-09-17 14:48:54 +02:00
Lephe
7b4eb078c4
move src/core to src/kernel 2020-07-26 11:49:33 +02:00
Renamed from src/core/start.c (Browse further)