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https://git.planet-casio.com/Lephenixnoir/gint.git
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171 lines
5 KiB
C
171 lines
5 KiB
C
//---
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// gint:clock - Clock signals, overclock, and standby modes
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//---
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#ifndef GINT_CLOCK
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#define GINT_CLOCK
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <gint/defs/types.h>
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/* This header used to expose the sleep() function; include <gint/cpu.h> to
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ensure this is still the case */
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#include <gint/cpu.h>
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//---
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// Clock signals
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//---
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/* clock_frequency_t
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A dump of the Clock Pulse Generator's (CPG) configuration. Use the MPU
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detection functions from <gint/mpu.h> to use the correct fields. */
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typedef struct
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{
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union {
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int PLL1;
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int FLL;
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};
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union {
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int PLL2;
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int PLL;
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};
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int Bphi_div;
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int Iphi_div;
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int Pphi_div;
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union {
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int CKIO_f;
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int RTCCLK_f;
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};
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int Bphi_f;
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int Iphi_f;
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int Pphi_f;
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} clock_frequency_t;
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/* clock_freq() - get the frequency of the main clocks
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This function returns the address of a static object which is used by the
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module; this address never changes. */
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const clock_frequency_t *clock_freq(void);
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/* cpg_compute_freq(): Compute the current clock frequency
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This function updates the data structure returned by clock_freq() by
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determining the current clock frequencies from the CPG. */
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void cpg_compute_freq(void);
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//---
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// Overclock
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//---
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/* The following enumerations define the clock speed settings supported by
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gint. These are always the settings from Ftune/Ptune, which are the most
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widely tested and gint treats as the standard. */
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enum {
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/* Combinations of hardware settings that are none of Ftune's levels */
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CLOCK_SPEED_UNKNOWN = 0,
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/* Ftune's 5 default overclock levels. The main settings are listed below,
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thoug many more are involved.
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On SH4 fx-9860G-likr:
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(Not supported yet)
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On the fx G-III series:
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(Not supported yet)
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On fx-CG 10/20:
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F1: CPU @ 58 MHz, BFC @ 29 MHz [Default speed]
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F2: CPU @ 58 MHz, BFC @ 29 MHz [Improved memory speed]
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F3: CPU @ 118 MHz, BFC @ 58 MHz [Faster than F2]
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F4: CPU @ 118 MHz, BFC @ 118 MHz [Fastest bus option]
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F5: CPU @ 191 MHz, BFC @ 94 MHz [Fastest CPU option]
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On fx-CG 50:
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F1: CPU @ 116 MHz, BFC @ 58 MHz [Default speed]
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F2: CPU @ 58 MHz, BFC @ 29 MHz [Clearly slower: F2 < F3 < F1]
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F3: CPU @ 94 MHz, BFC @ 47 MHz [Clearly slower: F2 < F3 < F1]
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F4: CPU @ 232 MHz, BFC @ 58 MHz [Fastest CPU option]
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F5: CPU @ 189 MHz, BFC @ 94 MHz [Fastest bus option] */
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CLOCK_SPEED_F1 = 1,
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CLOCK_SPEED_F2 = 2,
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CLOCK_SPEED_F3 = 3,
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CLOCK_SPEED_F4 = 4,
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CLOCK_SPEED_F5 = 5,
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/* The default clock speed is always Ftune's F1 */
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CLOCK_SPEED_DEFAULT = CLOCK_SPEED_F1,
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};
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#ifdef FXCG50
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/* clock_get_speed(): Determine the current clock speed
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This function compares the current hardware state with the settings for each
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speed level and returns the current one. If the hardware state does not
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correspond to any of Ftune's settings, CLOCK_SPEED_UNKNOWN is returned. */
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int clock_get_speed(void);
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/* clock_set_speed(): Set the current clock speed
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This function sets the clock speed to the desired level. This is "the
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overclock function", although depending on the model or settings it is also
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the downclocking function.
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The process of changing clock speeds is non-trivial, requires waiting for
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the DMA to finish its work and slightly affects running timers. You should
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avoid changing the clock speed constantly if not necessary. If this function
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detects that the desired clock speed is already in use, it returns without
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performing any change.
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Currently the clock speed is not reset during a world switch nor when
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leaving the add-in. */
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void clock_set_speed(int speed);
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#endif
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//---
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// Sleep functions
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//---
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/* sleep_us(): Sleep for a fixed duration in microseconds
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Stops the processor until the specified delay in microseconds has elapsed.
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(The processor will still wake up occasionally to handle interrupts.) This
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function selects a timer with timer_setup() called with TIMER_ANY. */
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void sleep_us(uint64_t delay_us);
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/* sleep_us_spin(): Actively sleep for a fixed duration in microseconds
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Like sleep_us(), but uses timer_spinwait() and does not rely on interrupts
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being enabled. Useful in timer code running without interrupts. */
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void sleep_us_spin(uint64_t delay_us);
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/* sleep_ms(): Sleep for a fixed duration in milliseconds */
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#define sleep_ms(delay_ms) sleep_us((delay_ms) * 1000ull)
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//---
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// Low-level overclock functions
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//
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// These low-level functions directly read or write registers involved in
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// setting the overclock level. Don't use them directly unless you understand
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// how their interactions with the environment; instead, use clock_set_speed().
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//---
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struct cpg_overclock_setting
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{
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uint32_t FLLFRQ, FRQCR;
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uint32_t CS0BCR, CS2BCR, CS3BCR, CS5aBCR;
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uint32_t CS0WCR, CS2WCR, CS3WCR, CS5aWCR;
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};
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/* Queries the clock setting from the hardware. */
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void cpg_get_overclock_setting(struct cpg_overclock_setting *s);
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/* Applies the specified overclock setting. */
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void cpg_set_overclock_setting(struct cpg_overclock_setting const *s);
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#ifdef __cplusplus
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}
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#endif
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#endif /* GINT_CLOCK */
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