mirror of
https://git.planet-casio.com/Lephenixnoir/gint.git
synced 2025-04-04 09:37:10 +02:00
d8886c7dbf
This change adds a TLB miss handler that calls __TLB_LoadPTEH() and removes the startu mapping of add-in pages in the explore() routine of src/core/start.c. Note that calling __TLB_LoadPTEH() manually might unexpectedly lead to a TLB multihit problem as the requested page might be accidentally loaded by a TLB miss in the code that loads it. A TLB multihit is a platform reset, so this function should always be considered unsafe to call (unless the calling code is in a combination of P1 space and ILRAM). This change also moves a lot of functions out of the .pretext section, notably topti, as this was designed to allow panic messages when the add-in couldn't be mapped entirely. By contrast, a GMAPPED macro has been defined to mark crucial kernel code and data that must remain mapped at all times. This currently puts the data in ILRAM because static RAM is not executable. An alternative will have to be found for SH3-based fx9860g machines. This version still does not allow TLB misses in timer callbacks and breaks return-to-menu in a severe way! It is not suitable for any stable application!
153 lines
4.2 KiB
C
153 lines
4.2 KiB
C
#include <gint/exc.h>
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#include <gint/display.h>
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#include <gint/clock.h>
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#include <gint/mpu/dma.h>
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#include <gint/defs/attributes.h>
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#include <gint/hardware.h>
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#define dprint(x, y, ...) dprint(x, y, C_BLACK, C_NONE, __VA_ARGS__)
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#define dtext(x, y, str) dtext (x, y, str, C_BLACK, C_NONE)
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/* gint_panic_default(): Default panic handler */
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GNORETURN GMAPPED static void gint_default_panic(GUNUSED uint32_t code)
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{
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uint32_t TEA, TRA;
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if(isSH3())
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{
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TEA = *(volatile uint32_t *)0xfffffffc;
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TRA = *(volatile uint32_t *)0xffffffd0 >> 2;
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}
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else
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{
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TEA = *(volatile uint32_t *)0xff00000c;
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TRA = *(volatile uint32_t *)0xff000020 >> 2;
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}
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uint32_t PC;
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__asm__("stc spc, %0" : "=r"(PC));
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uint32_t SGR = 0xffffffff;
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if(isSH4()) __asm__("stc sgr, %0" : "=r"(SGR));
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dfont(NULL);
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dclear(C_WHITE);
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#ifdef FX9860G
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dtext(1, 0, "Exception! (SysERROR)");
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for(int i = 0; i < 32; i++) gint_vram[i] = ~gint_vram[i];
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char const *name = "";
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if(code == 0x040) name = "TLB miss read";
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if(code == 0x060) name = "TLB miss write";
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if(code == 0x0e0) name = "Read address error";
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if(code == 0x100) name = "Write address error";
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if(code == 0x160) name = "Unconditional trap";
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if(code == 0x180) name = "Illegal instruction";
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if(code == 0x1a0) name = "Illegal delay slot";
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/* Custom gint codes for convenience */
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if(code == 0x1020) name = "DMA address error";
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if(code == 0x1040) name = "Add-in too large";
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if(name[0]) dtext(1, 9, name);
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else dprint(1, 9, "%03x", code);
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dprint(1, 17, " PC :%08x", PC);
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dprint(1, 25, "TEA :%08x", TEA);
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dprint(1, 33, "TRA :%08x", TRA);
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if(isSH4()) dprint(1, 41, "SGR :%08x", SGR);
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dtext(1, 49, "The add-in crashed.");
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dtext(1, 57, "Please reset the calc");
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#endif
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#ifdef FXCG50
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dtext(6, 3, "An exception occured! (System ERROR)");
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uint32_t *long_vram = (void *)gint_vram;
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for(int i = 0; i < 198 * 16; i++) long_vram[i] = ~long_vram[i];
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char const *name = "";
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if(code == 0x040) name = "TLB miss (nonexisting address) on read";
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if(code == 0x060) name = "TLB miss (nonexisting address) on write";
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if(code == 0x0e0) name = "Read address error (probably alignment)";
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if(code == 0x100) name = "Write address error (probably alignment)";
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if(code == 0x160) name = "Unconditional trap";
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if(code == 0x180) name = "Illegal instruction";
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if(code == 0x1a0) name = "Illegal delay slot instruction";
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/* Custom gint codes for convenience */
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if(code == 0x1020) name = "DMA address error";
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if(code == 0x1040) name = "Add-in not fully mapped (too large)";
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dprint(6, 25, "%03x %s", code, name);
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dtext(6, 45, "PC");
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dprint(38, 45, "= %08x", PC);
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dtext(261, 45, "(Error location)");
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dtext(6, 60, "TEA");
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dprint(38, 60, "= %08x", TEA);
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dtext(234, 60, "(Offending address)");
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dtext(6, 75, "TRA");
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dprint(38, 75, "= %#x", TRA);
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dtext(281, 75, "(Trap number)");
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dtext(6, 95, "An unrecoverable error ocurred in the add-in.");
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dtext(6, 108, "Please press the RESET button to restart the");
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dtext(6, 121, "calculator.");
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/* DMA address error handler */
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if(code == 0x1020)
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{
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#define DMA SH7305_DMA
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dprint(6, 141, "SAR0: %08x DAR0: %08x TCR0: %08x",
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DMA.DMA0.SAR, DMA.DMA0.DAR, DMA.DMA0.TCR);
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dprint(6, 154, "CHCR0: %08x", DMA.DMA0.CHCR);
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dprint(6, 167, "SAR1: %08x DAR1: %08x TCR1: %08x",
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DMA.DMA1.SAR, DMA.DMA1.DAR, DMA.DMA1.TCR);
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dprint(6, 180, "CHCR1: %08x", DMA.DMA1.CHCR);
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dprint(6, 193, "DMAOR: %04x", DMA.OR);
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#undef DMA
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}
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#endif
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dupdate();
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while(1) sleep();
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}
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/* Panic handler */
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GDATA GNORETURN void (*gint_exc_panic)(uint32_t code) = gint_default_panic;
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/* Exception catcher */
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GDATA int (*gint_exc_catcher)(uint32_t code) = NULL;
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/* gint_panic(): Panic handler function */
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GMAPPED void gint_panic(uint32_t code)
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{
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gint_exc_panic(code);
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}
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/* gint_panic_set(): Change the panic handler function */
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void gint_panic_set(GNORETURN void (*panic)(uint32_t code))
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{
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gint_exc_panic = panic ? panic : gint_default_panic;
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}
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/* gint_exc_catch(): Set a function to catch exceptions */
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void gint_exc_catch(int (*handler)(uint32_t code))
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{
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gint_exc_catcher = handler;
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}
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/* gint_exc_skip(): Skip pending exception instructions */
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GMAPPED void gint_exc_skip(int instructions)
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{
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uint32_t spc;
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/* Increase SPC by 2 bytes per instruction */
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__asm__("stc spc, %0" : "=r"(spc));
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spc += 2 * instructions;
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__asm__("ldc %0, spc" :: "r"(spc));
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}
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