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synced 2024-12-28 20:43:36 +01:00
dsp: enable integrated DSP in SR at startup
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parent
bc575f1599
commit
e63ff8351b
3 changed files with 76 additions and 12 deletions
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@ -36,4 +36,31 @@ void cpu_setCPUOPM(uint32_t CPUOPM);
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/* cpu_getCPUOPM(): Get the CPU OperatioN Mode register */
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uint32_t cpu_getCPUOPM(void);
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//---
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// Status Register
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//---
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/* Status Register bits */
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typedef lword_union(sr_t,
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uint32_t :1;
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uint32_t MD :1;
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uint32_t RB :1;
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uint32_t BL :1;
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uint32_t RC :12;
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uint32_t :3;
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uint32_t DSP :1;
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uint32_t DMY :1;
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uint32_t DMX :1;
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uint32_t M :1;
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uint32_t Q :1;
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uint32_t IMASK :4;
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uint32_t RF :2;
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uint32_t S :1;
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uint32_t T :1;
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);
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/* Get and set sr through the sr_t type */
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sr_t cpu_getSR(void);
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void cpu_setSR(sr_t sr);
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#endif /* GINT_CORE_CPU */
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@ -5,21 +5,23 @@
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.global _cpu_setVBR
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.global _cpu_setCPUOPM
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.global _cpu_getCPUOPM
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.global _cpu_getSR
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.global _cpu_setSR
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/* cpu_setVBR(): Change VBR address */
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.section .gint.mapped, "ax"
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_cpu_setVBR_reloc:
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mov.l r8, @-r15
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mov.l r9, @-r15
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sts.l pr, @-r15
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stc.l sr, @-r15
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/* Block all interrupts by setting IMASK=15 */
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mov #0xf, r1
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shll2 r1
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shll2 r1
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mov #0xf, r9
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shll2 r9
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shll2 r9
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stc sr, r0
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or r1, r0
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or r9, r0
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ldc r0, sr
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/* Set the new VBR address */
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@ -30,10 +32,17 @@ _cpu_setVBR_reloc:
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jsr @r5
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mov r6, r4
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/* Enable interrupts again by restoring the status register */
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ldc.l @r15+, sr
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lds.l @r15+, pr
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/* Enable interrupts again */
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stc sr, r0
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not r9, r9
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and r9, r0
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ldc r0, sr
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/* Return the previous VBR address */
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mov r8, r0
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lds.l @r15+, pr
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mov.l @r15+, r9
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rts
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mov.l @r15+, r8
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@ -68,5 +77,16 @@ _cpu_getCPUOPM:
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mov.l @r0, r0
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.align 4
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1: .long 0xff2f0000
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/* cpu_getSR(): Get status register */
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_cpu_getSR:
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stc sr, r0
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rts
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nop
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/* cpu_setSR(): Set status register */
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_cpu_setSR:
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ldc r4, sr
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rts
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nop
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@ -22,6 +22,7 @@ static void kinit_cpu(void);
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typedef struct
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{
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sr_t SR;
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uint32_t VBR;
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uint32_t CPUOPM;
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} ctx_t;
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@ -31,11 +32,19 @@ GBSS static ctx_t sys_ctx, gint_ctx;
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static void ctx_save(ctx_t *ctx)
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{
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if(isSH4()) ctx->CPUOPM = cpu_getCPUOPM();
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if(isSH4())
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{
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ctx->CPUOPM = cpu_getCPUOPM();
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ctx->SR = cpu_getSR();
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}
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}
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static void ctx_restore(ctx_t *ctx)
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{
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if(isSH4()) cpu_setCPUOPM(ctx->CPUOPM);
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if(isSH4())
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{
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cpu_setCPUOPM(ctx->CPUOPM);
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cpu_setSR(ctx->SR);
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}
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}
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//---
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@ -99,7 +108,15 @@ static void drivers_switch(int who)
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static void kinit_cpu(void)
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{
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if(isSH4()) cpu_setCPUOPM(cpu_getCPUOPM() | 0x00000008);
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if(isSH4())
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{
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cpu_setCPUOPM(cpu_getCPUOPM() | 0x00000008);
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/* Enable DSP mode on the CPU */
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sr_t SR = cpu_getSR();
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SR.DSP = 1;
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cpu_setSR(SR);
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}
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}
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/* kinit(): Install and start gint */
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