Commit graph

9 commits

Author SHA1 Message Date
Lephe
4a3c396284
fxcg50: remove rram region and fxcg20-friendly VBR address
This change removes the RRAM region which was inherited from the fx9860g
memory layout but no longer relevant on fxcg50. This removed one
occurrence of a hardcoded user stack address in the linker script, the
other being the VBR address. But since the VBR only contains
position-independent code that is manually "relocated" at startup, the
linker script needs not actually use its value, so this is not a true
dependency.

gint should now more or less be able to boot up on an fxcg20, except for
the hardcoded VRAM addresses which need to be moved to the fxcg20 system
stack.
2020-06-18 09:59:31 +02:00
Lephe
8148d89c88
core: backport TLB handling to fx9860g, fix return-to-menu (UNSTABLE)
This change ports the TLB management system to fx9860g through %003.
This raises the size limit for add-ins to about 500k.

Because SH3 fx9860g does not have ILRAM, the GMAPPED attribute has been
made to generate content to a .gint.mapped section which is sent to the
P1 RAM section historically dubbed "real ram" in which gint's data and
VBR are installed. (Now that I think about it, gint's data should try to
go to normal RAM instead to reduce pressure on this invasion.)

Return-to-menu was also fixed on both platforms by narrowing down the
need for code to remain mapped to the chance of running it with
interrupts disabled. The natural distribution of GMAPPED under this
criterion showed that _gint_setvbr had been left under TLB control;
moving it to the proper RAM area fixed gint switches.

Finally, an omission in the bound checks for mappable TEA addresses (TEA
>= 0x00300000) prevented the appearance of a non-interactible System
ERROR popup when some unmapped addresses are accessed.

This version still does not enable interrupts in timer callbacks,
exposing any application to a crash if a timer underflows while its
callback is not mapped. It is not suitable for any stable application!
2020-06-15 20:55:18 +02:00
Lephe
61da7debc8
code review and display driver changes
t6k11: use the gint array for variant detection
r61524: use true triple buffering by default
display: define DWIDTH and DHEIGHT
display: add C_RGB(r,g,b) (0 ≤ r,g,b ≤ 31) [fxcg50]
2020-02-23 16:05:25 +01:00
Lephe
15558c8fb3
support data loading in ILRAM, XRAM and YRAM
This change adds support for three sections .ilram, .xram and .yram,
along with three macros GILRAM, GXRAM and GYRAM, that can be used to
statically load data to on-chip memory.
2019-09-15 19:29:47 +02:00
lephe
e1aca8d89b
exc: add exception handlers, use them in the DMA
This change introduces exception handlers that default to a fatal error
with an on-screen description of the exception and some debugging
information.

It also adds the dprint() function as a definitely-needed helper and
removes bootlog_unmapped() by using the exception handler for the fatal
error display. (Also printf() is now required in all gint add-ins; this
is sad, but space is not as much of a constraint as debugging.)

Finally, the exception handler is used to handle an interrupt which is
an exception in practice, the DMA address error. On fx-CG 50, additional
DMA-related information is displayed on the screen. This is left out on
fx-9860G as there is not enough space.
2019-09-03 22:15:00 +02:00
lephe
3f7c0a04ad way too much, including bopti/topti, timers, and more. 2019-02-21 21:00:26 +01:00
lephe
298338f633 More timers, RTC, basic overclock-resistant keyboard, CPG, PFC, driver levels. 2018-08-19 17:11:37 +02:00
lephe
2f0e049c33 More interrupt system, exceptions, timers. 2018-08-01 20:41:36 +02:00
lephe
3b90b40dd7 Hybrid build system and runtime (no interrupts). t6k11 driver. Basic r61524 driver. 2018-04-19 13:24:26 +02:00